Sleep-on-Exit for Automated Low Power in Cortex-M3 (Explained)

Sleep-on-exit is a feature in Cortex-M3 processors that allows the processor to automatically enter a low power sleep mode when

Eileen David 23 Min Read

Understanding IDCODE values returned by Cortex debug ports

The IDCODE is a 32-bit code that provides details about the device, including the version, manufacturer, and part number. When

David Moore 8 Min Read

Cortex-M3 Memory Access Constraints with Caches and Shared Memory

The Cortex-M3 processor has advanced memory access capabilities through the use of caches and shared memory regions. However, these features

Holly Lindsey 6 Min Read

What is Instrumentation Trace Macrocell (ITM) in Arm Cortex-M?

The Instrumentation Trace Macrocell (ITM) is a tracing and debugging feature in Arm Cortex-M series processors. It provides a way

David Moore 14 Min Read

Latest Arm

Sleep-on-Exit for Automated Low Power in Cortex-M3 (Explained)

Sleep-on-exit is a feature in Cortex-M3 processors that allows the processor to automatically enter a low power sleep mode when

Eileen David 23 Min Read

WFI and WFE Instructions for Low Power in Cortex-M3 (Explained)

The WFI (Wait For Interrupt) and WFE (Wait For Event) instructions allow the Cortex-M3 processor to enter a low power

Andrew Irwin 12 Min Read

Understanding IDCODE values returned by Cortex debug ports

The IDCODE is a 32-bit code that provides details about the device, including the version, manufacturer, and part number. When

David Moore 8 Min Read

Cortex-M3 Memory Access Constraints with Caches and Shared Memory

The Cortex-M3 processor has advanced memory access capabilities through the use of caches and shared memory regions. However, these features

Holly Lindsey 6 Min Read

What is Instrumentation Trace Macrocell (ITM) in Arm Cortex-M?

The Instrumentation Trace Macrocell (ITM) is a tracing and debugging feature in Arm Cortex-M series processors. It provides a way

David Moore 14 Min Read

Software debuggers and configuring for CoreSight components (Arm Cortex-M)

Debugging software on Arm Cortex-M devices requires configuring the CoreSight components like the Embedded Trace Macrocell (ETM), Trace Port Interface

Eileen David 20 Min Read

Differences between JTAG-DP and SWJ-DP debug ports (Arm Cortex-M)

The JTAG-DP and SWJ-DP are two commonly used debug ports for ARM Cortex-M series microcontrollers. Both provide debug access and

Eileen David 8 Min Read

Supported Bus Protocols in the Cortex-M System Design Kit

The Cortex-M System Design Kit supports a range of bus protocols that allow the Cortex-M processor to interface with peripheral

David Moore 7 Min Read

Deep Sleep Mode for Maximum Power Savings in Cortex-M3

The Cortex-M3 processor offers a deep sleep mode that allows the system to enter an extremely low power state while

Andrew Irwin 9 Min Read
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