Debugging Cortex-M0 DesignStart on non-ARM FPGAs

Using the Cortex-M0 DesignStart IP core on non-ARM partner FPGAs can provide a low-cost way to prototype and evaluate ARM's…

Ryan Ryan 10 Min Read

Arm WFF Instruction

The ARM WFF instruction stands for Wireless Fast Forwarding instruction. It is used to optimize data movement within ARM-based systems-on-chip…

Ryan Ryan 6 Min Read

KEIL ULINK2 and ACTEL Cortex-M1 debugging issues

When debugging ARM Cortex-M1 chips using the KEIL ULINK2 debugger, users may encounter various issues that prevent effective debugging. The…

David Moore 7 Min Read

Understanding Indirect Branches on Arm with BX and BLX

Indirect branching allows jumping to an address stored in a register, providing flexibility in control flow. The Arm instruction set…

Graham Kruk 7 Min Read
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Flash Patch and Breakpoint Unit (FPB) in Arm Cortex-M Explained

The Flash Patch and Breakpoint (FPB) unit in Arm Cortex-M processors provides an efficient mechanism to rewrite flash memory contents…

Graham Kruk 11 Min Read

Cortex M4 Context Switching

Context switching refers to the process of storing and restoring the state of a CPU so that execution can be…

Javier Massey 9 Min Read

Debugging a Cortex-M0 Hard Fault

Experiencing a hard fault on a Cortex-M0 can be frustrating for developers. However, with some guidance, hard faults can often…

Holly Lindsey 6 Min Read

Fail to add JTAG/swd debug into Cortex-M0

Adding JTAG/SWD debug capability to a Cortex-M0 microcontroller can sometimes be tricky and fail unexpectedly. This is often due to…

Ryan Ryan 7 Min Read

What is the stack frame of the ARM Cortex exception?

The ARM Cortex exception stack frame is the region of memory used by the processor to store context information when…

Scott Allen 9 Min Read

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Is UART the same as serial?

The short answer is yes, UART is generally considered to be the same as serial…

How many registers are there in arm cortex-M4?

The ARM Cortex-M4 processor contains 37 registers in total. These registers can be categorized into…

SoCs using Cortex-A76 cores (Kirin, Exynos, Snapdragon, etc)

The Cortex-A76 is ARM's latest high-performance CPU core designed for mobile computing. It offers substantial…

How much memory does the Cortex-M33 have?

The Cortex-M33 is an ARM microcontroller that is part of the Cortex-M processor family. It is designed for embedded and…

Eileen David 13 Min Read

What is the Application Program Status Register (APSR) in Arm Cortex-M?

The Application Program Status Register (APSR) in Arm Cortex-M is a 32-bit register that contains application level status and control…

Jamie Kellett 9 Min Read

ARM Workflow with Interrupts Disabled

Disabling interrupts on an ARM processor can be useful in certain situations where real-time performance and determinism are critical. However,…

Scott Allen 7 Min Read

Code and RAM Size Optimization on ARM Cortex-M0

The ARM Cortex-M0 is one of the smallest and lowest power microcontrollers in the Cortex-M series. With its limited flash…

Neil Salmon 5 Min Read

What are the different debug interfaces that are available on the Cortex-M processor?

The Cortex-M processor family offers several debug interfaces that provide access to the core's internal registers, memory, and peripherals for…

Scott Allen 8 Min Read

Arm Fault Status Register

The ARM fault status register is a key register in ARM processors that provides information about exceptions and faults that…

David Moore 7 Min Read

Harvard vs Von Neumann Architecture Explained

The key difference between Harvard and Von Neumann architectures is that Harvard architecture has physically separate storage and signal pathways…

Andrew Irwin 13 Min Read

Hard Fault behavior differences across Cortex-M variants

The Cortex-M series of ARM processors are extremely popular in embedded systems due to their low cost, low power consumption,…

David Moore 8 Min Read

Interfacing ARM Cortex-M1 and Altera Virtual JTAG on FPGAs

Connecting an ARM Cortex-M1 processor to an Altera FPGA using the Virtual JTAG interface can be a powerful technique for…

Neil Salmon 8 Min Read

Troubleshooting errors when running make_mmi_file.tcl

Running into errors when trying to generate MMI files using the make_mmi_file.tcl script can be frustrating. This comprehensive guide will…

Ryan Ryan 6 Min Read

Configuring timers and GPIO for interrupt latency testing

The key to measuring interrupt latency is utilizing the ARM Cortex chip's timers and GPIO pins. By configuring a timer…

Neil Salmon 9 Min Read
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