Andrew Irwin

74 Articles

WFI and WFE Instructions for Low Power in Cortex-M3 (Explained)

The WFI (Wait For Interrupt) and WFE (Wait For Event) instructions allow the Cortex-M3 processor to enter a low power

Andrew Irwin 12 Min Read

Deep Sleep Mode for Maximum Power Savings in Cortex-M3

The Cortex-M3 processor offers a deep sleep mode that allows the system to enter an extremely low power state while

Andrew Irwin 9 Min Read

Is ARM Cortex A76 good?

The ARM Cortex-A76 is generally considered to be a very good mobile CPU core. It offers excellent performance and efficiency

Andrew Irwin 14 Min Read

What is the difference between Cortex-A76 and A77?

The ARM Cortex-A76 and Cortex-A77 are two of ARM's most advanced high-performance CPU cores designed for mobile, computing, and infrastructure

Andrew Irwin 9 Min Read

Setting CPU Targets for ARM Compilation with gcc

When compiling code for ARM processors using the gcc toolchain, it is important to set the correct CPU target in

Andrew Irwin 9 Min Read

Cortex-M3 Memory Region Types and Attributes

The Cortex-M3 is an ARM processor core designed for microcontroller applications. It has a Von Neumann architecture with separate code

Andrew Irwin 13 Min Read

What is the difference between Cortex-A75 and A76?

The ARM Cortex-A75 and Cortex-A76 are two of ARM's most powerful CPU cores designed for mobile devices. The Cortex-A76 succeeds

Andrew Irwin 8 Min Read

Tips on Optimizing Battery Life with Cortex-M0

The Cortex-M0 is an ultra low power 32-bit ARM Cortex-M microcontroller that is optimized for battery-powered and energy-harvesting applications. By

Andrew Irwin 7 Min Read

Harvard vs Von Neumann Architecture Explained

The key difference between Harvard and Von Neumann architectures is that Harvard architecture has physically separate storage and signal pathways

Andrew Irwin 13 Min Read

Accessing the ARM Application Program Status Register

The Application Program Status Register (APSR) is one of the key registers in the ARM Cortex series of processors. It

Andrew Irwin 13 Min Read

Demystifying Cortex M4 LDR/STR Instruction Timing

The Cortex-M4 processor implements the ARMv7E-M architecture. One of the key features of this architecture is the LDR (load register)

Andrew Irwin 6 Min Read

Difference between ARM7 and Cortex-M3

The key difference between the ARM7 and Cortex-M3 microcontrollers is that the ARM7 is an older generation 32-bit RISC processor

Andrew Irwin 20 Min Read
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