What is Serial Wire Viewer (SWV) in Arm Cortex-M?

Serial Wire Viewer (SWV) is a real-time trace functionality that is available in Arm Cortex-M microcontrollers. It allows real-time data…

Mike Johnston 9 Min Read

Arm Cortex-M DAP bus and interconnect architecture Explained

The Arm Cortex-M series of processors feature a Debug Access Port (DAP) that provides debug capability and access to the…

Neil Salmon 11 Min Read

Controlling Clocks and PLL for Power Savings in Cortex-M3

The Cortex-M3 processor provides multiple clock control features that allow significant power savings by slowing or stopping clocks when parts…

David Moore 12 Min Read

Sleep-on-Exit for Automated Low Power in Cortex-M3 (Explained)

Sleep-on-exit is a feature in Cortex-M3 processors that allows the processor to automatically enter a low power sleep mode when…

Eileen David 23 Min Read

Latest Arm

Difference Between Pre-Indexed and Post-Indexed Addressing Modes in Arm Cortex M

The main difference between pre-indexed and post-indexed addressing modes in Arm Cortex M is that in pre-indexed addressing, the offset…

Neil Salmon 9 Min Read

What is the clock speed of the Cortex-M3?

The Cortex-M3 is an ARM processor core designed for embedded and IoT applications. It is part of ARM's Cortex-M series…

Mike Johnston 8 Min Read

Switching from MSP to PSP for Cortex-M Task Switching

Task switching on Cortex-M microcontrollers can be done using either the Main Stack Pointer (MSP) or Process Stack Pointer (PSP).…

Jeday Schwartz 8 Min Read

Manually Stacking Registers for Cortex-M Context Switching

Context switching on Cortex-M microcontrollers requires manually saving and restoring register contents when switching between tasks. This involves stacking key…

Holly Lindsey 7 Min Read

Loading the EXC_RETURN Value for Cortex-M Context Switching

Context switching between threads or tasks on Cortex-M processors involves saving the context of one thread or task, then loading…

Graham Kruk 4 Min Read

Stack Frame Layout During Cortex-M Interrupts

When an interrupt occurs on a Cortex-M processor, the processor pushes registers onto the stack to save the current state…

Holly Lindsey 7 Min Read

Implementing a Round-Robin Scheduler on Cortex-M

A round-robin scheduler is a scheduling algorithm that sequentially cycles through a list of tasks, giving each task a slice…

Holly Lindsey 5 Min Read

Cortex-M Exception Handling and Return Mechanism

The Cortex-M processor implements robust exception handling capabilities to respond to events like exceptions, interrupts, and faults during program execution.…

Holly Lindsey 6 Min Read

Saving and Restoring Task Context on Cortex-M

When working with preemptive multitasking on Cortex-M microcontrollers, it is often necessary to save and restore the context of a…

Graham Kruk 7 Min Read
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