The Thread mode in Arm Cortex M3 refers to one of the processor modes that controls access privileges in the Cortex-M3 CPU. The Cortex-M3 CPU has several modes to control access and execution privileges, including Thread mode, Handler mode, and Privileged modes. The Thread mode is the default unprivileged execution state that allows normal application code to execute. This mode provides limited access to CPU resources and certain system registers.
Overview of Processor Modes in Cortex-M3
The Cortex-M3 processor implements the Arm v7-M architecture, which defines several processor modes to control access privileges on the system. The different modes in Cortex-M3 are:
- Thread mode – Default unprivileged execution mode for normal application tasks.
- Handler mode – Privileged mode used to execute exception handlers.
- Privileged modes -Includes Privileged, Fault, NMI modes used by the OS kernel code.
The processor always boots up in Thread mode, which allows execution of unprivileged application code. This mode provides limited access to CPU resources like system registers. When an exception occurs, the processor switches to Handler mode to execute the corresponding exception handler routine. The handler code runs in privileged mode and has full access to all system resources.
The privileged modes are reserved for the operating system kernel and have complete access to all resources on the system. These modes are entered on reset, or when a thread makes a system call to the kernel. The different modes allow creating access levels to protect critical system resources from unauthorized access.
Purpose of Thread Mode
The key purposes of the Thread mode in Cortex-M3 are:
- Allow execution of normal application code in an unprivileged level.
- Limit access to CPU resources and system registers during general program execution.
- Prevent unauthorized access to protected regions of code and memory.
- Reduce risk of programming errors or malicious code from corrupting the system.
Thread mode provides a safe environment for running less trusted application tasks. The privileged modes are reserved for trusted code like the OS kernel. This separation of execution modes allows creating a secure architecture to protect critical system resources.
Characteristics of Thread Mode
The key characteristics of Thread mode operation in Cortex-M3 are:
- Unprivileged access – Cannot directly access protected resources or regions in the memory map.
- Limited use of registers – Only general purpose registers R0-R12 can be freely used.
- No execution of certain instructions – Instructions like changing processor mode are not allowed.
- Automatic stacking – On exception entry, stacking occurs on main stack pointer.
- Triggers privileged exception handling – Attempts to access protected resources cause a usage fault exception.
These constraints on Thread mode prevent potentially dangerous operations and limit the instructions that can execute. Application code must securely transition to a privileged mode for full access to protected system resources.
Thread Mode Stack and Context Saving
When executing in Thread mode, each software thread maintains its own independent stack. This stack resides in the memory region accessible to Thread mode and stores local variables, function parameters, return addresses, and processor context during function calls.
On exception entry, the processor automatically saves context like stack pointer and program counter onto the current thread stack. This allows the thread to resume where it left off after handling the exception. The exception handler also uses the thread stack for any local data it requires.
Keeping each thread’s stack separate simplifies context switching during multithreading. The stack stores all information required to resume that particular thread execution later.
Switching between Modes
The processor mode only changes on certain events like:
- Exception or interrupt – Switches from Thread to Handler mode
- Exclusive access instructions – Switch to Privileged mode
- Returning from an exception – Restore previous Thread mode
- Kernel system call – Transition to Privileged execution
The application code cannot directly change the processor mode using software. But executing certain instructions or exceptions will trigger an automatic mode transition. For example, a failed memory access triggers a usage fault exception that switches from Thread to Handler mode.
The kernel manages entry into Privileged modes and returns back to Thread mode during a context switch. This prevents unauthorized elevation of privileges in the system.
Thread Mode Privilege Levels
The Arm architecture specifications define a Privilege Level for each processor mode. These levels determine access permissions, with higher levels having increased privileges.
- Thread Mode – Privilege Level 0, unprivileged execution.
- Handler Mode – Privilege Level 1, privileged execution.
- Privileged Modes – Privilege Level 2-3, fully privileged modes.
Higher privilege levels can always access resources assigned to lower levels. But lower levels cannot access resources beyond their privilege.
Thread mode runs application code at Privilege Level 0. This prevents unauthorized access to protected system resources reserved for higher privilege levels. Any attempt to access privileged resources from Thread mode will trigger a usage fault.
Thread Mode Resources
When executing in Thread mode, the processor dedicates certain resources like registers and memory regions specifically for this mode. The key resources available to Thread mode are:
- R0 to R12 general purpose registers – Freely accessible for normal usage.
- Main stack pointer (MSP) – Dedicated stack for thread stacks.
- Program counter – Normal flow of instruction execution.
- Application memory region – Accessible code and data section.
- Peripheral registers – Limited access depending on peripheral.
Access to registers like the program status word (PSW) or system configuration is not allowed. Only memory specifically assigned to Thread mode can be directly accessed without privilege elevation.
Typical Uses of Thread Mode
The normal applications tasks that execute in Thread mode include:
- Application logic – Algorithms, control code, math routines, etc.
- Data processing operations.
- User interface handler – Display update, input processing, etc.
- Non-critical utility functions.
- Communication protocols and device drivers – Basic I/O handling.
Any task that does not require access to protected system resources or privileged instructions can safely execute in Thread mode. Application developers generally utilize this mode for the bulk of program functionality.
Interaction with Handler and Privileged Modes
Thread mode primarily interacts with the other Cortex-M3 modes in the following ways:
- Entering Handler mode – Exception causes automatic switch to Handler mode.
- Return from Handler – Restore previous Thread mode state.
- System calls – Voluntarily transition to Privileged mode.
- Normal context switch – Save Thread mode context prior to switch.
The inter-operation between Thread mode and the privileged modes facilitates transitioning to a higher privilege level when required. This allows keeping application code simple and focused on functional requirements rather than system privileges.
Thread mode in Cortex-M3 provides an unprivileged execution environment for application tasks. It limits access to protected system resources to prevent programming errors or malicious code compromising the system. Privileged modes like Handler are reserved for trusted code sections like the OS kernel. The different privilege levels enable building secure, robust embedded systems using the Cortex-M3 processor.
In summary, the key points about Thread mode are:
- Default unprivileged mode for application code execution.
- Constrained access to registers, instructions, memory regions.
- Automatic stacking on exception entry.
- Transitions to Handler mode on exceptions.
- Lower privilege level than Handler and Privileged modes.
- Provides safe environment for running less trusted application tasks.
Understanding the purpose and characteristics of Thread mode is important for developers to effectively utilize the Cortex-M3 processor in embedded devices. Following the Arm v7-M architecture specifications when coding application tasks allows building robust systems leveraging the privilege levels provided by the different modes.