The ARM Cortex-M4 processor contains 37 registers in total. These registers can be categorized into the following types:
General Purpose Registers
The Cortex-M4 contains 13 general purpose 32-bit registers named R0-R12. These registers can be used for various data processing and address calculations. R13-R15 have special functions as listed below.
Special Registers
- R13 – Stack Pointer (SP)
- R14 – Link Register (LR)
- R15 – Program Counter (PC)
The Stack Pointer register points to the last stacked item on the stack. The Link Register stores the return address when a function call is made. The Program Counter contains the current instruction address.
Status Registers
There are 3 status registers in Cortex-M4:
- Application Program Status Register (APSR) – combines the function of four status flags into a single 32-bit register.
- Interrupt Program Status Register (IPSR) – contains the exception number of the current ISR.
- Execution Program Status Register (EPSR) – contains execution status information.
Control Registers
The control registers in Cortex-M4 are:
- Control Register (CONTROL) – configures privilege level and stack allocation.
- Fault Mask Register (FAULTMASK) – enables or disables certain exceptions and interrupts.
- Base Priority Mask Register (BASEPRI) – prevents low priority interrupts and exceptions from activating when non-zero.
- Priority Mask Register (PRIMASK) – prevents activation of all exceptions when set to 1.
System Registers
Some key system registers in Cortex-M4 are:
- Vector Table Offset Register (VTOR) – holds the offset address of the vector table.
- Application Interrupt and Reset Control Register (AIRCR) – sets priority grouping, endianness, system reset status.
- System Control Register (SCR) – configures sleep modes, SEVONPEND, and more.
- System Handler Control and State Register (SHCSR) – reports pending exceptions and configures fault exceptions.
Debug Registers
For debugging and trace capabilities, Cortex-M4 contains:
- Debug Halting Control and Status Register (DHCSR) – control and monitor the debug system.
- Debug Fault Status Register (DFSR) – shows debug error information.
- Debug Exception and Monitor Control Register (DEMCR) – enables debugging and trace functions.
Float Point Registers
Since Cortex-M4 supports single precision floating point, it contains 32 Single Precision Floating Point registers named S0-S31.
CPUID Registers
The CPUID registers provide information about the processor features and configuration:
- CPUID base register – Indicates ARM Cortex-M4 processor and Architecture version.
- Auxiliary Control Register – Enables or disables certain CPU features.
- CPUID registers 7 & 10 – Provide cache information.
Summary
In summary, the key register types and counts in ARM Cortex-M4 are:
- 13 General Purpose Registers (R0-R12)
- 3 Special Registers (SP, LR, PC)
- 3 Status Registers (APSR, IPSR, EPSR)
- 4 Control Registers
- Several System Registers like VTOR, AIRCR, SCR etc.
- Debug Registers like DHCSR, DFSR, DEMCR
- 32 Floating Point Registers (S0-S31)
- CPUID Registers
Which totals to around 37 registers in the Cortex-M4 processor. The exact count may vary slightly depending on the configuration. But in most standard configurations, there are 37 registers available for developers and programmers working with Cortex-M4 based microcontrollers.
