The ARM Cortex M0 watchdog timer is a hardware peripheral that can be used to automatically reset the microcontroller if the software execution goes out of control or gets stuck in an infinite loop. The watchdog timer runs independently from the main CPU and must be periodically refreshed by software to prevent it from timing out and resetting the system.
What is a Watchdog Timer?
A watchdog timer (sometimes abbreviated as WDT) is an electronic timer that is used to detect system anomalies and automatically take corrective actions. It operates independently from the main processor and will reset the system if the main program neglects to periodically service the watchdog.
The basic operation of a watchdog timer involves two components:
- A timer that is constantly counting down to zero
- A service routine that resets the timer before it reaches zero
As long as the main program is operating normally, it will call the service routine at regular intervals to restart the watchdog timer. If the program execution stops or gets stuck in a loop where it cannot reach the service routine, the watchdog timer will expire and generate a reset signal. This acts as a fail-safe mechanism to put the system back in a known good state.
Watchdog timers are commonly found in embedded systems, industrial controllers, and other electronic devices where high reliability is needed. They provide protection against software crashes, infinite loops, and other unpredictable events that can disrupt normal operation.
Watchdog Timer on ARM Cortex M0
The ARM Cortex M0 is an ultra low power 32-bit microcontroller targeted for simple embedded applications. It is an entry-level ARM core that is widely used in IoT edge devices, wearables, motor control, and other cost-sensitive and power-constrained applications.
The Cortex M0 includes an integrated watchdog timer module to monitor the program execution flow and reset the system if an anomaly is detected. The key features of the Cortex M0 watchdog timer are:
- 16-bit down counter
- Clock frequency up to 1 MHz
- Timeout period from 1 ms to 2 seconds
- Windowed operation mode
- Generates chip reset on timeout
- Requires periodic software servicing to avoid reset
The Cortex M0 watchdog timer runs off the Low-Power Internal RC Oscillator (LIRC) which can operate down to 1 KHz. This allows the watchdog timer to be kept running even in low power modes when the system clock is disabled.
Watchdog Operation Modes
The Cortex M0 watchdog timer has two main operating modes:
Basic Mode
In basic mode, the watchdog functions as a simple down counter. The counter is loaded with a timeout value and counts down towards zero. The software must periodically write a reload value to the counter before it reaches zero, otherwise the watchdog will timeout and reset the system.
Windowed Mode
Windowed mode provides more flexibility by defining a window during which the timer can be serviced. An upper and lower limit are defined to create the window. The software must reset the counter before it reaches the lower limit. Once serviced, the counter is reset to the upper limit value. This ensures the reset period falls within a certain window range.
Windowed mode helps avoidresetting the system if the watchdog is serviced too frequently or too slowly. Only timeouts within the window will trigger a system reset.
Watchdog Register Overview
The key registers associated with the Cortex M0 watchdog timer include:
- WDTLOAD: 16-bit load value that determines the reset timeout period
- WDTCLEAR: Write to clear the counter and prevent reset
- WDTCONTROL: Control register to configure watchdog mode and other settings
- WDTLOCK: Lock register to prevent watchdog configurations from changing
These registers allow complete control over the watchdog behavior. WDTLOAD sets the timeout period, WDTCLEAR services the watchdog, and WDTCONTROL configures the operating mode and interrupt generation.
Watchdog Initialization
A typical workflow for initializing the Cortex M0 watchdog timer is:
- Select clock source (internal RC oscillator)
- Set WDTLOAD value based on desired timeout
- Configure reset enable and operating mode in WDTCONTROL
- Clear watchdog counter by writing to WDTCLEAR
- Enable interrupts or stall mode if required
- Start watchdog timer
For example: // 1. Select internal RC oscillator as clock source // 2. Load timeout value for 1 second (assuming 1 MHz RC clock) WDTLOAD = 1000000; // 3. Enable reset on timeout, set windowed mode WDTCONTROL = 0x3; // 4. Clear watchdog counter WDTCLEAR = 0xABCD; // 5. Enable interrupts on timeout WDTCONTROL |= (1 << 2); // 6. Start watchdog WDTCONTROL |= (1 << 0);
This configures the watchdog timer to reset the system if it is not cleared within a 1 second software window.
Servicing the Watchdog
To prevent the watchdog from timing out, the software must periodically clear the counter before it reaches the lower limit in windowed mode or the 0 value in basic mode.
This is done by writing any value to the WDTCLEAR register. For example: void Watchdog_Refresh() { WDTCLEAR = 0xABCD; // Clear watchdog counter }
The refresh rate should account for the worst-case time it takes to execute the critical code sections and service the watchdog. Typically the watchdog is configured with at least a 2x or 3x margin versus the maximum expected system loop time.
Watchdog Uses
Some common uses of the Cortex M0 watchdog timer include:
- Recovery from crashes: Resets the system if the software crashes or locks up
- Critical event monitoring: Resets MCU if critical tasks fail to run
- Safety monitoring: Resets system if software doesn’t toggle I/O pin within timeout window
- Oscillator failure detect: Monitors clocks and resets MCU if clocks stop or fail
- Brownout detection: Detect power failure events and initiate shutdown
The watchdog timer is an essential component for building robust and reliable embedded systems using the Cortex M0 MCU. It functions as an independent monitor to catch software anomalies and reset the system to a known good state.
Summary
Key points about the ARM Cortex M0 watchdog timer:
- Hardware peripheral that resets MCU after timeout period
- Runs independently from main CPU
- Software must periodically clear counter to avoid reset
- Configurable timeout from 1ms to 2 sec
- Windowed mode provides flexibility on servicing
- Essential for catching crashes and hardware failures
The Cortex M0 watchdog provides a simple yet effective way to make embedded systems more robust. With proper timeout values and servicing routines, it can automatically detect anomalies and recover the system. Understanding how to initialize, configure, and use the watchdog effectively is important for any Cortex M0 based design.
