When it comes to power efficiency in x86 CPUs, there are a few key factors to consider. The most important is the manufacturing process node. Smaller process nodes allow for lower voltage operation, resulting in reduced power consumption. The leading edge right now is TSMC’s 5nm node, which enables excellent power efficiency. However, Intel and AMD’s latest desktop chips are still on 10nm or 7nm nodes. In the mobile space, Intel’s 12th gen U and P series chips built on 10nm SuperFin stand out for their efficiency.
The manufacturing process node refers to the size of the smallest features on a CPU die. As process nodes shrink, this allows chip designers to either fit more transistors in the same space, or operate those transistors at lower voltages while maintaining performance. Lower voltages directly translate to lower power consumption. Each new node usually brings a 10-15% power efficiency gain just from operating at a lower voltage.
Right now, the leading edge is TSMC’s 5nm process being used for Apple’s M1 series chips. However, in the x86 world, the latest desktop chips from Intel and AMD are still built on 10nm or 7nm class nodes. For example, Intel’s 12th gen Core i9-12900K uses the Intel 7 process, while AMD’s Ryzen 9 7950X is built on TSMC’s 5nm process. So there is still room for power efficiency gains in x86 chips once 5nm becomes more widely adopted.
Beyond just process node, the microarchitecture design of the CPU cores also plays a big role in efficiency. Chip designers focus on architecture optimizations to boost performance without scaling up power consumption. This includes techniques like deeper pipelines, improved branch prediction, larger caches, and more execution units to maximize work done per clock cycle.
Higher efficiency cores are also designed to dynamically scale voltage and frequency based on workload. This allows them to operate at the lowest voltage needed for a target performance level. Intel and AMD have advanced power management tech in their CPU architectures to take advantage of this.
Core Count and Layout
Higher core count CPUs can provide more total performance, but also use more power. So the optimal balance is key. For desktops, 8 cores is typically the sweet spot today for high efficiency. For laptops, 4 cores balances performance and efficiency well based on typical workloads.
The layout and arrangement of cores on the die also affects power efficiency. With multi-core chips, putting cores in close proximity allows them to share common caches more easily. This reduces data movement and power consumption compared to isolated cores.
Integrated vs. Discrete GPU
Integrated GPUs that are on the same die as the CPU cores use much less power than discrete graphics chips. They leverage shared resources with the CPU like caches and memory controllers. Intel Iris Xe and AMD Ryzen Vega graphics provide decent graphics performance at low power draws of 10-25W, whereas discrete GPUs often use 100W+ under load.
So for maximizing power efficiency, integrated graphics are ideal for lighter workloads. Discrete GPUs deliver much higher performance, but sacrifice efficiency to do so.
Intel 12th Gen U and P Series
In the mobile space right now, Intel 12th gen Core U and P series processors stand out for their power efficiency while still delivering solid performance. These chips are built on Intel’s 10nm Enhanced SuperFin process node.
The U series is their mainstream lineup focused on thin and light notebooks and 2-in-1s. Flagship models like the Core i7-1265U have up to 12 cores (4 performance, 8 efficiency) and are configurable from 9W to 55W TDP. The hybrid architecture maximizes performance and battery life.
The P series is geared towards higher performance notebooks and mobile workstations. The Core i7-1280P offers similar hybrid cores to the U series but scales up to 64W sustained power draw and 28W nominal TDP.
In benchmarks, these 12th gen mobile chips show significant gains in performance per watt over 11th gen and AMD Ryzen alternatives while using less power in real world workloads.
Alder Lake Hybrid Architecture
The key innovation Intel brought with 12th gen Core is the hybrid architecture combining both performance and efficiency cores. This allows workloads to be dynamically shifted to the optimal core type for the required performance level.
The performance cores (P-cores) handle demanding workloads and are based on the Golden Cove architecture, scaling up to 5GHz peak frequencies. The efficiency cores (E-cores) are based on the Gracemont architecture focused on high throughput at low power, around 1.8GHz.
This hybrid approach achieves performance leadership while also maximizing power efficiency by better matching workloads to core capabilities. Initial benchmarks show as much as a 40% gen-over-gen increase in performance per watt.
10nm SuperFin Enhancements
Built on the refined 10nm SuperFin process, the 12th gen Core chips operate at lower voltages from 0.65-1.3V dynamically based on workload, down from 0.8-1.5V on 11th gen Tiger Lake. The SuperFin transistors also switch faster at lower voltages.
Intel optimized the 10nm SuperFin node for frequency, performance and power. At the transistor level, they used strain engineering techniques to improve drive current in the P-cores while reducing leakage power. In combination with the hybrid architecture, this allows the 12th gen mobile chips to scale performance dynamically within a low 15-28W power envelope.
Optimized Uncore and Interconnects
Intel also focused on optimizing the uncore components like the system agent, memory controller, and interconnects to maximize power efficiency. The system agent and memory controller were redesigned for higher bandwidth and lower latency at reduced power draw.
On-die interconnects like the ring bus were enhanced to provide data transfer rates over 1TB/s while operating more efficiently. And by combining P-cores and E-cores on a single ring interconnect, overall data movement is minimized versus having separate clusters.
AMD Ryzen 6000 Series
On the AMD side, the latest Ryzen 6000 U-series and H-series chips built on 6nm Zen 3+ architecture also deliver excellent power efficiency in laptops. The Ryzen 7 6800U for example has 8 cores and 16 threads within a 15W TDP envelope. The redesigned Zen 3+ cores and improved 6nm process allow it to operate at similar or better performance as last gen while using less power.
In head-to-head benchmarks, the Ryzen 6000 series trades blows with Intel’s 12th gen Core in power efficiency, generally within a few percentage points. Key Zen 3+ enhancements like increased L2 cache, higher clock speeds and reduced latency keep AMD competitive on performance per watt.
For light workloads, the Ryzen chips may have a slight edge. But under sustained heavy workloads, Intel 12th gen Core models maintain higher performance at a given power level. Either way, both platforms stand out in the mobile space as the most power efficient x86 options currently available.
TSMC 6nm Process
The Ryzen 6000 series is manufactured on TSMC’s 6nm process node. This is an optimization of their 7nm node, providing a modest increase in transistor density along with improved power efficiency. Through process refinements, TSMC claims the 6nm node enables 10% lower power or 5% higher performance versus 7nm.
This allows the Ryzen 6000 chips to either squeeze more performance out of the same 15-45W power envelopes as last gen, or maintain the same performance at lower power draw. Either way, it translates to better power efficiency than Ryzen 5000 laptop chips.
Zen 3+ Core Optimizations
AMD also made architecture level improvements in the new Zen 3+ cores to boost performance and efficiency. One of the biggest changes is increasing the L2 cache size from 512KB to 1MB per core. This reduces latency and memory access power. The L3 cache capacity also increased from 16MB to 32MB on the high end.
Higher clock speeds up to 5GHz were enabled through logic optimizations to reduce latency and power draw. AMD claims >15% better performance per watt versus Zen 3 cores thanks to these and other enhancements targeted at improving efficiency.
Updated Platform Technologies
For mobile Ryzen 6000 systems, AMD also updated their platform technologies like Radeon graphics, I/O dies, and Infinity Fabric. The integrated GPUs now support higher clock speeds and use less power. The I/O die was manufactured on the 6nm process and optimized for lower power.
Infinity Fabric power management was improved to further reduce interconnect power draw during idle states through clock gating techniques. All these platform updates complement the enhanced efficiency of the Zen 3+ cores.
Apple M1 Series
While not x86, Apple’s M1 series ARM-based chips deserve a mention for pushing power efficiency boundaries. Built on a 5nm process, M1 Pro and M1 Max deliver outstanding performance per watt that exceeds most x86 mobile chips while using much lower power.
For example, the M1 Max 10-core CPU variant only draws around 30W peak while rivaling or exceeding the performance of 45W Intel and AMD laptop chips. The unified system-on-chip (SoC) architecture and Apple’s aggressive performance-per-watt focus allow their Silicon to far surpass x86 on efficiency.
Up to 10 high-performance Firestorm cores handle demanding workloads, while 4 power-efficient Icestorm cores optimize for throughput. The cores share a large L2 cache and up to 64GB of unified memory. All this minimizes data movement and power consumption.
The 5nm node, unified architecture, large caches, high memory bandwidth, and aggressive power management all contribute to exceptional efficiency even at full load. The tradeoff is reduced flexibility and upgradability compared to socketed x86 laptop platforms.
Unified SoC Architecture
The M1 chips combine the CPU, GPU, memory, storage, and I/O controllers onto a single SoC die. This unified architecture minimizes data transfers between separate chips and enables extensive power optimizations not possible on discrete components. It’s estimated this integrated approach improves M1 power efficiency by up to 50% versus a hypothetically split architecture.
All components can scale voltage and frequency automatically based on workload. The CPUs, GPUs, and other logic share memory interfaces and large caches reducing external accesses. Fine-grained power management maximizes idle power savings across the SoC.
5nm Process Node
Built by TSMC on the industry-leading 5nm process, the M1 SoCs operate at extremely low voltages nearing 0.4V even at full load. This enables excellent performance per watt that x86 chips on 10nm/7nm nodes can’t match yet. Even versus the latest mobile Ryzen and Core CPUs, M1 chips generally use less power while outpacing them in performance.
TSMC’s 5nm node sets a new bar for power efficiency. It uses EUV lithography to enable denser standard cell libraries. Local interconnects were optimized for lower parasitic capacitance and resistance. All this translates to lower operating voltages at the transistor level.
Aggressive Power Management
Apple has aggressively optimized the M1 systems for power efficiency even under load. Technologies like unified memory architecture and large low-power caches aim to keep data on-chip and minimize external memory access. The cores aggressively scale voltage and frequency in 1 millisecond increments based on instantaneous workload demands.
The companion U1 system management controller monitors system activity to enable fine-grained power management of individual components in real-time. All these advances allow Apple Silicon to offer x86-beating performance within remarkably tight power budgets.
In summary, the most power efficient x86 CPUs currently are Intel’s 12th gen Core U and P series mobile processors, and AMD’s latest Ryzen 6000 U and H series chips. The combination of refined 10nm and 6nm manufacturing processes along with architecture improvements give these processors excellent performance per watt.
Apple’s M1 SoCs take power efficiency to even higher levels through their 5nm process node and aggressive efficiency optimizations. But in the Windows/Linux ecosystem, Intel 12th gen and AMD Ryzen 6000 stand out as the top x86 choices for maximizing performance within tight power constraints.
Looking ahead, x86 power efficiency should continue improving as 5nm processes mature, and hybrid architectures like Intel’s P+E cores become more common. There is still untapped potential for gains as the microarchitecture and process nodes scale. But today, Intel Alder Lake and AMD Zen3+ offer the best x86 power efficiency currently available.