Debugging application failures when generating projects for Cortex-M1 devices in Vitis can be challenging without proper logging and tracing techniques. The key is having visibility into the build process to identify where and why failures occur. This article provides guidance on enabling logs in Vitis, interpreting log messages, and leveraging tracing utilities like Arm Streamline to gain insight into code execution on Cortex-M1 hardware.
Enabling Build Logging in Vitis
The Vitis IDE provides options to enable verbose logging during the application build process. This is critical to capturing errors, warnings, and other details that point to issues generating the executable. To enable build logging in Vitis:
- Open your Vitis workspace and application project
- In the Project Explorer pane, right click on the application project and select Properties
- Under C/C++ Build, select Settings
- In the Tool Settings tab, select ARM vitis compiler>Miscellaneous
- Check the Verbose mode box to enable detailed build logging
- Increase the Verbosity level to at least Medium or High for more log contents
- Click Apply and Close to save the settings
With verbose logging enabled, the next application build will output detailed messages to the console view in Vitis. Checking this output for errors, warnings, or other indicators can provide clues into why code generation failed.
Interpreting Vitis Build Log Messages
Vitis build logs contain various messages produced by the compiler, linker, and other build tools. Here are some key things to look for:
- Errors: Indicates issues that prevented successful compilation or linking. Address errors before moving forward.
- Warnings: Flags conditions that could indicate problems to investigate, but don’t necessarily block code generation.
- Failed to open: Points to missing files or invalid build configurations. Double check paths and settings.
- Undefined reference: Suggests missing libraries or object files needed to resolve symbols.
- Library/object search paths: Provides visibility into where the linker is searching for required files.
In many cases error messages will provide specific guidance, such as undefined macros or invalid function arguments. Try to isolate the first compilation error and address it before moving on to others. Warnings may also offer hints into questionable code constructs or project configurations.
Using Arm Streamline for Tracing
While build logging provides compile/link-time visibility, actually running code on Cortex-M1 hardware requires a tracing utility like Arm Streamline to gain execution insights. Key steps include:
- Install Streamline on your development machine and configure for your target.
- Instrument your code by adding Streamline API calls to capture trace data.
- Build the application with Streamline enabled.
- Run the application on Cortex-M1 hardware and collect trace output.
- Analyze the trace in Streamline to identify code paths, stalls, exceptions etc.
Streamline trace provides a window into program execution that build logs lack. This can reveal issues like invalid memory access, task switching problems, I/O bottlenecks, and more. Advanced analysis features even enable correlating code with pipeline state, stacks, registers and other low-level architecture details.
Key Arm Streamline Features
- Code Profiling: See precise execution time and call counts for application and RTOS functions.
- Microarchitecture Analysis: Correlate code with underlying hardware like pipelines, memory architecture etc.
- System Logging: Capture exception events, kernel invocations, task switches, interrupts and more.
- Memory Access Analysis: Identify invalid accesses, memory leaks, cache issues, etc.
Streamline integration enables non-intrusive capture of these rich execution details without complexity. The resulting insights can illuminate software defects or optimization opportunities not visible from static build logs.
Best Practices for Debugging in Vitis
Here are some recommended best practices for debugging Cortex-M1 application build failures in Vitis using logs and Streamline tracing:
- Enable verbose build logging during development and inspect output closely after failures.
- Analyze logs methodically – resolve first error, then move to next.
- Double check compiler/linker command lines and search paths when build fails.
- Examine warnings as they may indicate bugs not yet causing errors.
- Add Streamline instrumentation to capture execution tracing.
- Profile code frequently as bugs manifest differently when running on hardware.
- Compare code vs. data traces to validate timing and performance.
Developing complex applications for Cortex-M class processors can be difficult without visibility. Following these practices will help identify issues in the development cycle early, and gain critical insights when debugging on real hardware. logs and tracing are key tools that any embedded developer should master to improve productivity on ARM-based designs.
Debugging application build failures requires a systematic approach, leveraging both compile-time log analysis and run-time tracing. Vitis provides configuration options to enable verbose logging during the build process, capturing valuable details from the compiler, linker and other tools. Developers must learn to interpret these logs to pinpoint errors early. Arm Streamline delivers correlated views of code execution on Cortex-M hardware, exposing bugs that logs alone cannot reveal. Together, these techniques form a methodology to accelerate development on complex ARM embedded systems.