ARMv8.1-M is the latest architecture within the ARM Cortex-M series of embedded and IoT processors. It introduces key enhancements for security, machine learning, and digital signal processing while maintaining full compatibility with previous Cortex-M generations.
Overview of ARM Cortex-M Series
The Cortex-M series is ARM’s range of 32-bit RISC processors optimized for microcontroller applications. First launched in 2004, Cortex-M processors now power over 50 billion chips shipped annually across consumer, industrial, medical, and automotive segments.
Key attributes of Cortex-M processors include:
- In-order execution pipeline for low power and real-time determinism
- Memory Protection Unit for robustness and security
- NVIC for managing interrupts and low latency event response
- Integrated flash memory and SRAM controller
- Various debug features like breakpoints, watchpoints, and profiling
The Cortex-M series is divided into three main families based on architecture version – Cortex-M0/M0+, Cortex-M3/M4, and Cortex-M7. Each family scales performance and features for different application requirements. ARMv8-M was introduced in 2015 for the Cortex-M7 processor delivering DSP capabilities.
Introducing ARMv8.1-M Architecture
ARMv8.1-M architecture builds upon ARMv8-M with enhancements focused on security, machine learning, DSP, and real-time applications. The first processor implementation of ARMv8.1-M is the Cortex-M55 launched in 2019.
Key features introduced in ARMv8.1-M include:
- TrustZone-M – Adds support for secure and non-secure states, enabling implementation of hardware enforced security.
- DSP instructions – Extends DSP and floating point instruction set for boosting ML and signal processing workload performance.
- Enhanced buses – Supports up to 16 bus masters for more flexible system designs.
- Advanced timers – More timers with enhanced features for real-time applications and control systems.
- MVE extensions – Vector processing extensions to accelerate ML, vision, and DSP algorithms.
ARMv8.1-M has also added various microarchitectural improvements around caches, bus fabric, memory subsystem, and interrupts.
TrustZone-M Security
A key feature in ARMv8.1-M is the introduction of TrustZone-M technology. It provides system-wide hardware enforced security through the following capabilities:
- Secure and non-secure states – System can switch states based on security requirements.
- Banked registers – Separate register banks for secure and non-secure states.
- Bus masters – Each bus master tagged as secure or non-secure.
- Memory regions – Memory regions configured as secure or non-secure.
- Peripheral access – Peripherals only accessible by secure or non-secure bus masters.
TrustZone-M allows system designers to isolate and protect sensitive code, data, and peripherals from the rest of the system. Some example uses cases include:
- Storing passwords, encryption keys securely in protected flash area.
- Secure boot to ensure only authentic code is executed.
- Enabling access to a peripheral only to secure masters.
- Adding access permissions to memory regions.
Software in the secure state can access both secure and non-secure resources while non-secure software can only access non-secure resources. This prevents security breaches from impacting the entire system.
Enhanced DSP and Floating Point
ARMv8.1-M doubles the number of DSP instructions compared to ARMv8-M, supporting more arithmetic formats. Key enhancements include:
- More single instruction, multiple data (SIMD) instructions for parallel processing.
- Hardware acceleration for half and single precision floating point operations.
- High accuracy fixed point arithmetic for up to 64-bit values.
- Dedicated instructions for complex number arithmetic.
The improved DSP instruction set enables higher performance on workloads like:
- Machine learning inference using neural network models.
- Sensor fusion in autonomous robotics systems.
- Digital signal processing algorithms on speech, audio, images, and video.
- Control systems using high precision closed loop control.
Cortex-M processors with ARMv8.1-M can execute most ML models much faster while also being highly energy efficient. This enables on-device ML deployment.
MVE Vector Processing Extensions
The MVE extensions in ARMv8.1-M add vector processing capabilities to Cortex-M processors. Key attributes:
- 128-bit vector registers to perform SIMD operations.
- Vector load/store instructions to move data between vectors and memory.
- Arithmetic, logical, permutation, and reduction operations on vectors.
- Looping constructs for easier vector programming.
MVE enables accelerating various algorithms such as:
- Image processing filters like convolution and histograms.
- Harris corner detection for feature matching.
- K-means clustering for machine learning.
- FIR filtering for digital signal processing.
Application performance can increase from 2x to as high as 10x depending on how much parallelism the algorithms can exploit using MVE.
Real-Time Capabilities
ARMv8.1-M provides various enhancements for real-time applications with deterministic execution requirements:
- Up to 16 priority levels for interrupts.
- Each bus master can be assigned a bandwidth allocation.
- Timing-proof peripherals for lag-free response.
- Low interrupt latency with reduced context switching.
- New RTOS features like preemption masking.
These capabilities allow Cortex-M processors to meet stringent real-time requirements while also running complex software like an OS, networking stack, and ML workloads.
Backward Compatibility
A key feature of ARMv8.1-M architecture is backward compatibility with previous Cortex-M generations. This provides a smooth migration path for existing MCUs and microprocessors to take advantage of the new capabilities.
ARMv8.1-M maintains binary compatibility with ARMv6-M, ARMv7-M, and ARMv8-M instruction sets. Existing software like RTOS, drivers, and applications can run without modifications on ARMv8.1-M cores. Peripheral interfaces are also unchanged.
For new software, ARMv8.1-M features can be easily utilized using compiler extensions and libraries for DSP, ML, and MVE programming. TrustZone-M capabilities can be enabled through configuration instead of code changes.
Backward compatibility enables OEMs to refresh existing MCU products with ARMv8.1-M cores to get better performance, efficiency, and features without expensive software changes.
Cortex-M55 Implementation
The Cortex-M55 processor is the first implementation of the ARMv8.1-M architecture. Announced in 2019, it targets advanced embedded and edge applications.
Key attributes of Cortex-M55 include:
- Up to 1 GHz clock frequency.
- 8-stage dual-issue pipeline for higher performance.
- ARM MVE and DSP extensions.
- Memory Protection Unit with TrustZone-M.
- Fast low latency caches and TCM interface.
- Advanced power management and efficient 9-stage memory pipeline.
The Cortex-M55 enables over 2x higher DSP and ML performance compared to Cortex-M7 while also being highly power efficient. It is seeing adoption in robotics, industrial automation, EV charging systems, and other IoT applications requiring on-device ML.
Summary
ARMv8.1-M delivers key enhancements to the Cortex-M processor family around security, ML readiness, DSP, and real-time performance while maintaining compatibility with legacy software investments.
TrustZone-M enables robust hardware enforced security to protect sensitive systems. The expanded DSP instruction set, MVE extensions, and higher performance microarchitecture accelerate machine learning, digital signal processing, and analytics at the edge. And determinism improvements allow efficiently running real-time and embedded OS workloads.
The Cortex-M55 is the first ARMv8.1-M implementation targeting advanced workloads. Its combination of higher performance and power efficiency is driving adoption in various embedded and edge computing applications requiring additional ML, DSP, and security capabilities.
