The ARM Cortex-R52+ is the latest processor core in ARM’s Cortex-R series aimed at high-performance real-time applications. Announced in late 2022, the Cortex-R52+ builds upon the capabilities of the previous generation Cortex-R52 processor with enhancements focused on boosting performance, efficiency, and machine learning capabilities.
Overview
Like other Cortex-R series processors, the Cortex-R52+ is designed for use in safety-critical embedded systems that require determinism, high reliability, and functional safety certification. Typical applications include automotive ADAS, industrial automation, robotics, medical devices, and railway systems.
The Cortex-R52+ is a 64-bit Armv8-R architecture CPU that can be configured from 1 to 4 cores. It incorporates multi-layered lockstep technology for soft error resilience. The CPU cores support ARMv8.1-R architecture with Scalable Vector Extension (SVE) for improved machine learning performance.
Key features of the Cortex-R52+ include:
- Up to 4 cores with lockstep capability
- Armv8.1-R architecture with SVE support
- Enhanced performance and efficiency
- Richer memory hierarchy
- Deterministic real-time capabilities
- Safety features for ISO 26262 ASIL-D certification
- Machine learning performance boost
Performance and Efficiency
The Cortex-R52+ delivers up to 30% higher performance than the previous gen Cortex-R52. This performance gain comes from microarchitecture enhancements as well as the inclusion of SVE technology.
To improve energy efficiency, the Cortex-R52+ implements enlarged out-of-order buffers, advanced branch prediction, and improved load/store bandwidth. Power gating is also supported on individual cores and integrated L2 caches. These optimizations provide over 20% better energy efficiency compared to the prior generation.
The addition of SVE allows the Cortex-R52+ to achieve much higher machine learning performance using vector processing while keeping safety certification intact. SVE enables ML workloads to run alongside real-time tasks on the same processor.
Memory System
The Cortex-R52+ features an enhanced memory system to feed its higher performance cores. Key improvements include:
- L1 instruction and data caches increased from 64KB to 128KB
- Up to 8MB of integrated L2 cache per cluster with power gating support
- Improved L1 and L2 cache latencies
- Increased bandwidth for instruction and data accesses
- Virtualization of memory system resources
These changes allow the cores to operate at higher frequencies while reducing access times to cached data. The large L2 cache improves latency and bandwidth for memory-intensive workloads.
Real-Time Capabilities
Real-time responsiveness and determinism are critical requirements in embedded safety-critical systems. The Cortex-R52+ maintains ARM’s leadership in this area with features like:
- Deterministic L1 cache and TLB behavior
- Timing predictable execution for more consistent interrupt latencies
- Enhancements for virtualization and parallelism
- Isochronous capabilities for time-critical control tasks
The processor enables flexible real-time task scheduling and benefits from the Arm R profile architecture. Quality of Service controls allow system resources to be prioritized for critical functions.
Safety and Reliability
For functional safety and reliability, the Cortex-R52+ incorporates features like:
- Lockstep CPU redundancy
- ECC support on caches and interconnect
- Parity checking on register files and pathways
- Self-testing capabilities
- Error detection and reporting mechanisms
These capabilities allow the Cortex-R52+ to achieve ISO 26262 ASIL-D safety certifications for the highest integrity automotive applications. The lockstep cores enable instant error detection and recovery from soft errors such as radiation-induced bit flips.
Development Environment
Cortex-R52+ processor implementations will be supported by ARM’s development tools including:
- ARM Compiler toolchain
- DS-5 Development Studio
- Streamline performance analysis
- mbed OS for Cortex-R profile devices
These enable high level software development in languages like C/C++ and assembly. Compiler optimizations take advantage of the SVE extensions for ML workloads. Analysis tools allow tuning real-time performance.
Licensing and Availability
The Cortex-R52+ CPU is available for licensing to ARM partners for integration into SoC designs. Lead partners have already licensed the Cortex-R52+ and ARM expects it to have a swift uptake in the market.
First commercial silicon based on the Cortex-R52+ is expected to sample in 2023. This will enable SoC products containing the new CPU to begin production rollout within 2 years for use in advanced embedded devices with AI capabilities.
With its boosts to performance, efficiency, safety, and machine learning, the Cortex-R52+ continues ARM’s leadership in R-profile CPUs for critical real-time embedded applications.
