Debugging ARM Cortex-M1 cores implemented in Altera FPGAs can be challenging, but with the right tools and setup, it can be done efficiently. This guide will walk through the key steps involved in setting up debugging for ARM Cortex-M1 cores in Altera FPGAs using the ARM Debug Interface v5 (ADIv5) and a JTAG debugger like the Segger J-Link.
Overview of ARM Cortex-M1 Debugging
The ARM Cortex-M1 processor implements ARMv6-M architecture which includes support for hardware debugging through the use of the ARM Debug Interface. The debug interface provides a standard way for debuggers to connect to and control the processor during debugging sessions. This is done through the JTAG (IEEE 1149.1) or SWD (Serial Wire Debug) ports.
To enable debugging, the Cortex-M1 debug module must be programmed with the correct debug authentication key. This key is proprietary to ARM and prevents unauthorized access to the debug interface. Once the debug module is unlocked, debug tools like GDB can connect to examine and control the processor state.
Obtaining the ARM Debug Authentication Key
Since the ARM debug authentication key is proprietary, it must be obtained from ARM directly or through an ARM partner. There are a few ways to get this key:
- Purchase an ARM Debug Interface Key from ARM directly
- Obtain the key from an ARM SoC/CPU vendor who licenses ARM cores
- Extract the key from a device already programmed with the key
For prototyping and small production runs, purchasing the key directly from ARM is likely the easiest route. The authentication key comes in the form of a 128-bit value that needs to be programmed into the Cortex-M1 debug module.
Programming the Debug Authentication Key
On Altera FPGAs, the ARM Cortex-M1 processor is implemented as a soft core in the programmable logic. This means the debug authentication key must be programmed into the Cortex-M1 debug module as part of the FPGA bitstream.
There are a few ways to integrate the key into the bitstream:
- Add the 128-bit key value as a parameter to the Cortex-M1 IP core
- Store the key in non-volatile memory like flash and load it at runtime
- Directly program the key value into the bitstream using a technique like partial reconfiguration
The first option of passing the key as a parameter to the IP core is the most straightforward. The ARM IP core integration tool in the Quartus Prime software allows entering the 128-bit value when customizing the Cortex-M1 settings.
Storing the key in an external flash and loading it at runtime requires additional logic and firmware development. Similarly, using partial reconfiguration to program the key requires advanced FPGA design techniques.
For quick prototyping, passing the debug key directly to the IP core is recommended. Just make sure to save the key value in a safe place because it cannot be recovered from the FPGA bitstream alone.
Connecting the Debugger
With the debug authentication enabled in the FPGA bitstream, the Cortex-M1 debug module will now accept connections from a debugger. The ARM CoreSight debug architecture used in Cortex-M processors supports both JTAG and SWD interfaces.
On most development boards, there will be dedicated JTAG and SWD connector ports to tap into. For custom designed boards, pins from the FPGA or an external debug connector will need to be mapped to the JTAG/SWD signals of the Cortex-M1 core.
Once the physical interface is connected, any CoreSight-compatible debugger can be used. Segger J-Link debug probes are a popular choice that work seamlessly with the Cortex-M1. The J-Link handles the debug protocol and provides plugins for various IDEs like Eclipse.
Launching a Debug Session
With all the preliminaries set up, we can now start a full debug session with the Cortex-M1 soft core implementation. The typical steps are:
- Connect the J-Link debugger probe to your board
- Launch your IDE (e.g. Eclipse CDT) and configure the J-Link connection settings
- Connect to the target Cortex-M1 processor
- Load your program executable onto the target
- Set breakpoints and watches in the code
- Start debug run, step through code, and inspect variables
Advanced debugging features like memory inspections, register examination, and debug scripting can all be leveraged once initial communication is established. The debugger and IDE will provide various windows, views, and tools to control and visualize the state of the processor.
Debugging hard faults and early boot code requires sending special commands to the Cortex-M1 debug module to set the program counter or tweak exception handling settings. Consult the debugger reference manual for the exact procedures.
Debugging Without Authentication Key
If the ARM-provided authentication key is not available, debugging options are limited but still possible. The Cortex-M1 debug module provides a bypass mode that gives access to basic memory read/write commands. However, stepping through code and advanced debugging is not supported.
Debug bypass mode can be enabled by setting the bypass enable register in the ARM CoreSight debugger. With bypass mode active, views of memory contents and peripheral registers can still be useful for troubleshooting.
So in summary, the ARM debug authentication key enables the full suite of debugging features but is not absolutely required to get started with basic debug access.
Troubleshooting Issues
Like any complex electronic system, there are many things that can go wrong with setting up debugging. Below are some common issues and potential solutions:
- JTAG/SWD interface not working – Check connections, ensure voltage levels are 3.3V, and pins are mapped correctly.
- Debugger disconnects or hangs – Reset JTAG adapter, ensure latest firmware, check target power.
- Cannot connect to target – Confirm debug authentication key is programmed correctly and matches debugger expectations.
- Debug functions fail or behave unexpectedly – Review debugger manual and confirm proper procedure and configuration is being followed.
Hardware issues typically revolve around electrical connectivity and signal integrity. Software issues are often fixed by updating debugger firmware, IDE, and target code to latest stable versions. Following debugger logs and prompts closely can also reveal the source of problems.
Conclusion
Debugging ARM Cortex-M1 soft cores in Altera FPGAs presents some unique challenges compared to standard microcontroller development. With the proper debugger setup, including the crucial ARM debug authentication key, the full suite of ARM debugger features can be unlocked. While the initial configuration requires some effort, the payoff is a professional embedded debug environment right within your custom FPGA design.
