When developing applications for Cortex-M1 based microcontrollers, one important decision is where to place the RTX RTOS code – either in external RAM or the on-chip ITCM RAM. Both options have their pros and cons from performance, memory usage and application design perspectives. Choosing the right approach depends on the specific requirements and constraints of your project.
Overview of External RAM and ITCM on Cortex-M1
On Cortex-M1 MCUs, there are typically two main memory regions available to developers:
- External RAM – This is off-chip RAM connected to the Cortex-M1. It offers a large memory capacity, but has higher latency and consumes more power to access compared to on-chip RAM.
- ITCM RAM – ITCM stands for “Tightly Coupled Memory” and resides on-chip with the Cortex-M1 CPU. It has very low latency and power consumption, but is limited in size (e.g. 16-64 KB).
When deciding where to place the RTX RTOS code, utilizing one region over the other has implications on performance and memory usage that must be considered.
Placing RTX Code in External RAM
Storing the RTX RTOS code in external RAM has some benefits:
- Larger capacity – External RAM is abundant, so space is less of a concern for code storage.
- Data sharing – External RAM allows sharing data easily between RTOS and application code.
- Dynamic allocation – Memory for RTOS objects can be allocated dynamically from external RAM.
However, there are also some downsides to placing RTX code in external RAM:
- Higher latency – Accessing external RAM has longer latency than ITCM due to leaving the Cortex-M1 chip.
- Increased power – More power is required to access external RAM compared to ITCM.
- Memory contention – Extensive use of external RAM for code can leave less capacity for data storage.
- Cache misses – Cortex-M1 cache is ineffective for external RAM accesses.
These downsides can degrade real-time performance of the RTOS. Latency of kernel services increases due to slower external RAM accesses. Higher power consumption also occurs due to more external memory activity.
Placing RTX Code in ITCM RAM
Alternatively, the RTX RTOS code can be placed in ITCM RAM. This offers some advantages:
- Faster access – ITCM has single-cycle access latency, much faster than external RAM.
- Lower power – No external memory accesses means lower power consumption.
- Determinism – Tightly coupled nature results in deterministic access times.
- Cached accesses – Cortex-M1 cache operates effectively for ITCM contents.
However, limitations when using ITCM RAM include:
- Limited capacity – ITCM is typically only 16-64 KB, not enough space for many applications.
- Static allocation – All RTOS objects must be statically allocated at compile time.
- Data separation – Data needs to be in external RAM, cannot be shared with RTOS code.
The tight size constraints of ITCM means the RTX kernel size must be minimized through configuration options. All RTOS objects also must have pre-determined sizes. This requires advanced planning and limits flexibility during development.
Performance and Memory Usage Tradeoffs
In summary, utilizing external RAM provides abundant capacity for RTOS code with dynamic object allocation, but at the cost of higher latency and power. ITCM RAM usage results in fast deterministic RTOS operation and lower power, but at the expense of reduced flexibility due to size constraints.
For applications requiring absolute minimum latency or low power operation, ITCM with a tightly optimized RTOS configuration is likely the best approach. The application design must work within the limited ITCM capacity and plan object allocation at compile time.
For less latency-sensitive applications requiring dynamic runtime behavior or advanced RTOS features, external RAM with dynamic object allocation would be preferable, despite slightly higher power and slower kernel services. The application can leverage abundant external RAM for both code and data storage.
In either case, care must be taken to utilize the Cortex-M1 caches properly. Keeping critical code and data within ITCM allows cached accesses. Preloading caches with external RAM contents prior to use can also help minimize latency. The Cortex-M1 memory architecture must be well understood to maximize real-time performance.
Additionally, a hybrid approach is also feasible. Non-critical RTOS code can be placed in external RAM, while time-critical primitives and ISRs are put in ITCM. This balances dynamic behavior with optimized real-time performance. Partitioning code appropriately requires careful planning.
Thorough benchmarking and analysis should be done to quantify tradeoffs and overheads involved with different RTX code placement options. Profiling tools can provide valuable insights on latency sources and memory bottlenecks.
In conclusion, for a Cortex-M1 based system, the choice between external RAM or ITCM usage for the RTX RTOS requires striking a balance between memory usage, dynamic behavior, real-time performance and power consumption based on application requirements and constraints.
Guidelines for Developers
Based on the analysis, here are some guidelines developers can follow when deciding on RTX code placement in Cortex-M1 designs:
- Minimize RTX kernel size if using ITCM to avoid running out of capacity.
- Use configuration options like static memory allocation for ITCM-based RTX code.
- Plan all RTOS object sizes carefully if using ITCM.
- Place performance-critical ISRs and kernel functions in ITCM.
- Preload key external RAM contents into cache before use.
- Use hybrid approach with non-critical code in external RAM if needed.
- Do profiling and benchmarking to quantify impacts of placement choices.
- Understand tradeoffs between memory usage, performance, and power consumption.
- Balance dynamic runtime needs and real-time requirements.
Following these guidelines and best practices can help developers choose the optimal RTX code placement strategy for their particular Cortex-M1 application requirements and design constraints.
With careful planning, configuration and testing, either external RAM or ITCM usage for the RTX RTOS can enable high-performance Cortex-M1 designs.