The Cortex-M4 processor includes a floating point unit (FPU) to support single precision floating point operations. However, saving and restoring the FPU registers during a context switch can add significant overhead. This article will discuss techniques to reduce this context switch overhead by avoiding unnecessary saving/restoring of the FPU registers.
FPU Registers in Cortex-M4
The Cortex-M4 FPU contains 32 single precision floating point registers known as S0-S31. These registers store floating point data during floating point operations. By default, the entire FPU register file (S0-S31) will be automatically saved and restored during a context switch by the Cortex-M4 system architecture.
Saving all 32 FPU registers requires transferring 128 bytes of data to/from memory during each context switch. This transfer takes time and consumes energy. In some applications, much of this data transfer may be unnecessary if not all FPU registers need to be preserved across a context switch.
Identifying Unused FPU Registers
To avoid wasting cycles saving/restoring unused FPU registers, the application must identify which registers need to be preserved across a context switch. This requires analyzing the application to determine:
- Which tasks use the FPU?
- Which FPU registers does each task use?
Tasks that do not use the FPU do not require any FPU register context to be saved/restored during context switches. For tasks that do use the FPU, only those registers that must be preserved across context switches need to be saved/restored.
Saving/Restoring Select FPU Registers
Once the required FPU register context has been identified for each task, the context switch code can be optimized to only save/restore the necessary registers. For example:
- Task A requires FPU registers S0-S7 preserved across context switches.
- Task B does not use the FPU at all.
During a switch from Task A to Task B, only S0-S7 need to be saved. During a switch back to Task A, only S0-S7 need to be restored. No FPU register context needs to be transferred for Task B.
Manual FPU Register Saving/Restoring
To implement selective FPU register saving/restoring, the normal automatic save/restore mechanism must be disabled. This is done by clearing the ASPEN bit in the FPCCR register: // Disable automatic FPU context saving FPCCR &= ~(1 << 30);
With automatic saving/restoring disabled, the application is responsible for manually saving and restoring the required FPU registers during each context switch.
This can be accomplished by reading the active FPU registers to memory before a context switch, and writing them back after the switch. For example, to save registers S0-S7: // Save S0-S7 for (i = 0; i < 8; i++) { vfp_reg[i] = __builtin_arm_vfp_rreg(i); }
The __builtin_arm_vfp_rreg intrinsic allows reading the S0-S31 registers. Similarly, __builtin_arm_vfp_wreg can be used to write the registers and restore context.
Lazy FPU Register Saving
Further optimization can be achieved by using lazy saving of FPU registers. With this technique, FPU registers are only saved if the task has actually used the FPU since the last context switch.
A per-task FPU usage flag can track whether the FPU has been used: // Per-task FPU usage flag uint32_t fpuUsed; // Clear flag on context switch fpuUsed = 0;
Then when compiling the task’s code, the compiler can set the fpuUsed flag if any FPU instructions are generated: // Compiler inserts this on any FPU instruction fpuUsed = 1;
Before saving FPU context, check the fpuUsed flag to determine if saving is actually required: if (fpuUsed) { // Save FPU registers for (i = 0; i < 8; i++) { vfp_reg[i] = __builtin_arm_vfp_rreg(i); } }
With this technique, the overhead of saving unused FPU registers is avoided whenever the FPU has not been utilized since the last context switch.
Benefits
Optimizing FPU context switching using the techniques described can provide several benefits:
- Reduced context switch time – avoiding unnecessary FPU register transfers saves cycles
- Reduced energy consumption – transferring 128 bytes across the bus on every context switch consumes significant power
- Simpler application code – manual context management centralized in the RTOS port or context switch handler
For applications using the Cortex-M4 FPU that require low latency context switches, optimizing the FPU context saving can result in tangible performance, energy efficiency, and code maintenance improvements.
Challenges
However, reducing FPU context switching overhead does come with some challenges:
- Increased software complexity – manually managing FPU registers is more complex than automatic save/restore
- Requires static analysis – determining required FPU context requires analyzing software at compile-time
- Runtime overhead – extra instructions needed to check lazy restore conditions
So it requires careful analysis to determine if the trade-off in complexity vs cycles/energy saved is beneficial for a particular application.
Conclusion
The Cortex-M4 FPU provides high performance single precision floating point computation. But saving/restoring the full FPU register file during context switches can incur significant overhead. Analyzing application software to identify only the minimum FPU registers required to be preserved across context switches allows optimizing the context switch code to selectively save/restore only the necessary FPU state. This avoids transferring unused FPU registers, reducing context switch latency and energy consumption. Overall, with careful software analysis and implementation, selectively optimizing FPU context management can unlock performance and efficiency benefits in Cortex-M4 designs utilizing the FPU.
