The Cortex-A76 processor from ARM provides powerful debugging capabilities through the use of CoreSight technology. CoreSight enables real-time access to the CPU, memory system and peripherals while debugging. This allows developers to easily trace software execution, analyze memory corruption, inspect register contents and more when debugging applications running on Cortex-A76.
Introduction to CoreSight
CoreSight is ARM’s debug and trace technology built into Cortex-A processors and ARM-based systems-on-chips (SoCs). It provides a standard way for debug tools to access components within an ARM system. The key components of CoreSight include:
- Trace source components like program trace macrocells that gather information about software execution.
- Trace links that transport trace data from source to destination.
- Trace sinks like trace port interfaces that deliver trace data to debug tools.
- Debug control and access components like debug APB that enable control and visibility of the system.
On Cortex-A76, CoreSight provides interfaces to CPU cores, interconnects, peripherals, memory controllers and more. This enables seamless, system-wide observability for debug. The cross-trigger interface (CTI) allows events from different components to be correlated precisely.
Debug Capabilities with CoreSight on Cortex-A76
Here are some of the key debugging capabilities enabled by CoreSight technology on Cortex-A76:
The program trace macrocell (PTM) in CoreSight can capture information about software execution on each CPU core. This instruction trace can then be analyzed to understand program flow, identify bugs, detect anomalies etc. Trace capture can be started/stopped dynamically and filters can be applied to capture traces only for specific software components.
Data and Address Trace
In addition to instruction trace, CoreSight components like system trace macrocell (STM) can capture data and address trace information. This allows inspection of load/store operations, memory addresses accessed and data values. STM trace can reveal memory corruption, analyze memory access patterns, reverse engineer code etc.
The timestamping capabilities in CoreSight allow accurate measurement of events and reporting of CPU pipeline information. This enables tracking overall system performance, identifying bottlenecks and hotspots, measuring response times of individual software components and more.
Even for hard-to-reproduce bugs that cause crashes, CoreSight enables capture of extensive trace data leading up to the crash. This trace data can then be analyzed post-mortem to reconstruct events and identify root causes of the bugs.
The debug access port (DAP) in CoreSight provides access to memory mapped resources in the system. This enables debug tools to read/write memory and peripheral registers while software is running. Memory can also be accessed post-mortem to inspect the software state.
OS Aware Debug
CoreSight includes extensions to enable OS-aware debugging. Components like the embedded cross trigger (ECT) generate cross-triggers based on events from multiple cores, threads, processes, etc. This allows tracing context switches, thread interactions, inter-process communications etc.
Using CoreSight for Debugging on Cortex-A76
To leverage CoreSight for debugging applications on Cortex-A76, a debug tool that integrates with CoreSight is required. Some options include:
ARM Development Studio
ARM’s flagship toolchain and debugger that offers deep integration with CoreSight components. It provides an Eclipse-based IDE, compiler, debugger, profiler and more. The debugger supports multi-core tracing, memory access, OS awareness and other CoreSight-enabled capabilities.
Third-party Debug Probes
Many third-party vendors offer debug probe hardware compatible with CoreSight on Cortex-A chips. These probes connect to the target over JTAG or SWD interface and leverage CoreSight components to enable debugging through GDB or proprietary software.
Trace Decoder Software
CoreSight trace streams can be captured to file and analyzed offline using trace decoder utilities. For example, ARM Trace Decoders can parse instruction and system trace into human readable information for post-processing and debugging.
CoreSight Components on Cortex-A76
Here are some of the key CoreSight components available on the Cortex-A76 processor:
Embedded Trace Macrocell (ETM)
ETM implements program trace capability, capturing traces for instructions executed by the CPU core. It can trace branches, exceptions, timestamped events, etc. ETM tracing enables understanding software execution flow.
Embedded Trace Router (ETR)
ETR acts as the router between trace sources like ETM and trace sinks. It steers trace data from source components to destinations like memory or debug tools.
Trace Memory Controller (TMC)
TMC provides large on-chip RAM that can be used as a trace buffer. Trace data from ETM can be stored in TMC memory for subsequent analysis. This enables tracing without need for constant streaming to external debug tools.
Debug Access Port (DAP)
DAP acts as the access mechanism for debug tools to access internal resources via standard interfaces like JTAG. DAP offers access to register reads/writes, breakpoint configuration, memory access, CoreSight component access and more.
Cross Trigger Interface (CTI)
CTI generates cross-triggers between multiple components connected to it, like CPU cores, DAP, ETM, etc. This allows events from one component to trigger actions in another, enabling precise correlation of system-wide trace data.
Platform Trace Receiver (PTR)
PTR collects trace data from sources across the system and consolidates it into a single streamed output. This streamed trace data can be analyzed by external tools to provide a unified view of system activity.
Debugging Sample SoC with Cortex-A76 and CoreSight
As an example, let’s look at how CoreSight can enable debugging on a sample SoC with dual Cortex-A76 processor cores, CCI-500 interconnect and peripheral devices like UART, SPI, I2C, etc. The Cortex-A76 cores incorporate ETM for instruction trace. ETM traces can be routed via ETR to TMC for capture or PTR for streaming off-chip. DAP provides JTAG/SWD debug access and CTI coordinates cross-triggers between the dual cores. A debugger like ARM DS-5 can connect to the DAP port and leverage these CoreSight components to enable virtual instruction execution, memory access, breakpoint configuration, trace stream decoding and other capabilities. The trace streams from ETM can provide instruction flow analysis. STM tracing memory accesses identifies memory corruptions. Timestamped traces enable profiling to find performance bottlenecks. Cross-triggers between cores facilitates precise multi-core debugging. Overall, CoreSight technology extends powerful observability and debug capabilities to Cortex-A76 and ARM-based SoC platforms.
CoreSight technology integrated with ARM’s Cortex-A76 processor enables robust debug capabilities like instruction trace, data/address trace, performance monitoring, post-mortem analysis and more. CoreSight components like ETM, DAP, CTI and PTR extend system-wide observability and real-time access for debug tools. By leveraging CoreSight capabilities, developers can significantly accelerate the debugging process when building applications on Cortex-A76 based systems.