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Arm

ARM Cortex-M for Beginners

Elijah Erickson
Last updated: September 7, 2023 11:46 am
Elijah Erickson 8 Min Read
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The ARM Cortex-M is a family of 32-bit microcontroller cores developed by ARM Holdings. Cortex-M cores are designed for embedded applications requiring high efficiency and low power consumption. They are frequently used in IoT and wearable devices.

Contents
Introduction to ARM Cortex-MCortex-M Core ArchitectureInstruction SetMemory ArchitectureBus InterfacesCortex Microcontroller SoftwareAssembly ProgrammingC ProgrammingIDEs, Libraries & DriversCortex-M Development BoardsConclusion

Introduction to ARM Cortex-M

ARM Cortex-M cores are based on the ARMv6-M to ARMv8-M architectures. They are simpler and smaller than application class ARM cores like Cortex-A and Cortex-R. The ‘M’ stands for microcontroller. The major differences between Cortex-M and application cores are:

  • Cortex-M cores have a simplified architecture and instruction set designed specifically for embedded applications. They do not support operating systems.
  • They contain their own embedded flash memory and RAM on chip. There is no external memory interface.
  • They have a Nested Vectored Interrupt Controller (NVIC) to handle interrupts and exceptions.
  • They include dedicated low latency peripheral interfaces for connecting to on-chip peripherals.
  • They have lower power consumption due to simpler design.

The ARM Cortex-M family currently includes 5 core profiles optimized for different applications:

  • Cortex-M0/M0+ – Entry level cores for cost sensitive applications.
  • Cortex-M3 – Mid range cores balancing performance and cost.
  • Cortex-M4 – Digital signal control with built-in DSP instructions.
  • Cortex-M7 – Highest performance M-class cores with multiprocessor support.
  • Cortex-M23/M33 – Microcontroller cores with optional TrustZone security.

Cortex-M Core Architecture

The CPU core architecture of Cortex-M processors contains the main pipeline and microarchitecture. Some key components include:

  • Program Counter (PC) – Contains address of current instruction being executed.
  • Instruction Pipeline – Fetches, decodes and executes machine code instructions.
  • Processor Core – Arithmetic Logic Unit (ALU) and datapath for executing instructions.
  • Memory Protection Unit (MPU) – Optionally implements memory protection.
  • Nested Vectored Interrupt Controller (NVIC) – Handles interrupt and exception requests.

The Cortex-M pipeline is 3 stage – Fetch, Decode and Execute. It uses a Von Neumann architecture with unified instruction and data memory. The processor core contains thirteen 32-bit registers including Stack Pointer, Link Register and Program Status Register.

Instruction Set

Cortex-M processors have a specially designed Thumb instruction set optimized for embedded applications. The Thumb-2 instruction set extends the original with additional 16 and 32-bit instructions. Key features include:

  • High code density to improve performance per MHz.
  • Load/store architecture with most instructions operating on registers.
  • Conditional execution of many instructions to reduce branching.
  • BARRIER instructions for managing memory access ordering.
  • Exclusive access instructions using monitors for thread safety.
  • Optional single cycle I/O port instructions for fast peripheral access.

Memory Architecture

Cortex-M cores use a Von Neumann architecture with a unified address space for instructions and data. The memory system consists of:

  • Code Memory – Flash memory for storing code and constants.
  • SRAM – Fast scratchpad memory for data.
  • BootROM – Optional ROM for booting and low level exception handling.
  • Bit-Banding – Maps single bit accesses to word sized addresses.

All memory access on Cortex-M processors are via simple load/store instructions. There are no alignment constraints on data access. Bit-banding provides atomic access to single bits in memory mapped IO registers.

Bus Interfaces

On-chip bus interfaces connect the core to memory and peripherals. This includes:

  • IB-bus – Instruction interface to fetch code from Flash.
  • DB-bus – Data interface to access SRAM and memory mapped registers.
  • PB-bus – Peripheral interface for low latency I/O.
  • AHB-lite – Advanced high speed bus for core to memory transactions.

The AHB-lite interface is a subset of the full AMBA AHB specification. It provides a high bandwidth interface to on chip memories and peripherals. Multiple bus masters can be supported for multiprocessor systems.

Cortex Microcontroller Software

Software development for Cortex-M microcontrollers involves assembly, C/C++ and use of IDEs & libraries.

Assembly Programming

Assembly programming is used to write low level code where high performance or small code size are critical. The processor specific assembly language mnemonics mirror the Thumb-2 instruction set. Examples include:

  • MOV – Move register contents
  • ADD – Add two registers
  • STR – Store register to memory
  • LDR – Load memory into register
  • B – Branch to target

Assembly code can be written using ARM’s asm directives for managing sections and symbol linkage. The GNU assembler and toolchain supports ARM assembly language for Cortex-M.

C Programming

The C language can be used for programming Cortex-M microcontrollers. This allows code to be portable between different ARM cores. Key features are:

  • Standard C library (Newlib) for common functions.
  • Inline assembly for hardware specific code.
  • Intrinsic functions to access special instructions.
  • C++ support including classes, templates and exceptions.
  • RTOS and middleware libraries.

Compilers like GCC and ArmCompiler convert C code to optimized ARM Thumb-2 instructions. A startup file initializes the processor and runtime environment. The linker handles memory placement.

IDEs, Libraries & Drivers

Software development kits from vendors include IDEs, debuggers, utilities and middleware libraries to speed up development on Cortex-M. Common tools include:

  • GCC – Compiler toolchain including GDB debugger.
  • OpenOCD – Open source JTAG debugger.
  • Arm Mbed – SDK for Cortex-M devices.
  • STM32Cube – STMicroelectronics software library.
  • CMSIS – Standard headers and peripherals drivers.

Device configuration tools allow setting clocks, pinmuxing and other parameters usually via GUI. Most also include Real Time Operating System (RTOS) libraries for task scheduling and synchronization.

Cortex-M Development Boards

Various development boards are available to help prototype and develop on Cortex-M processors from ARM vendors. These contain the microcontroller along with connectors for expansion boards. Popular boards include:

  • STM32 Discovery/Nucleo – STM32 Cortex-M development boards with Arduino headers.
  • NXP LPCXpresso – NXP LPC Cortex-M development boards.
  • Micro:Bit – ARM designed board for education and rapid prototyping.
  • Adafruit Feather – Feather compatible boards using Cortex-M4 processors.
  • Arduino M0 – Arduino compatible boards with Cortex-M0 processors.

These low cost boards provide an easy way to get started with ARM Cortex-M software development and prototyping IoT applications before designing a custom board.

Conclusion

The ARM Cortex-M processor family delivers high performance 32-bit computing for embedded microcontroller applications requiring low cost and power consumption. With their simplified architecture, Thumb instruction set and ample development tools, Cortex-M cores are an ideal choice for designing IoT and wearable devices.

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