What is the reset vector address of ARM Cortex-M0?

The reset vector address of ARM Cortex-M0 is 0x00000000. This is the memory address that the processor will start executing code from after a reset.

Introduction to ARM Cortex-M0

The ARM Cortex-M0 is a 32-bit RISC processor core designed for microcontroller applications. It is one of the most basic and lowest power member of the Cortex-M series of ARM processor cores. The Cortex-M0 is intended to replace 8-bit and 16-bit microcontrollers in a wide range of applications including home appliances, industrial control systems, motor control, sensors, white goods etc.

Key features of Cortex-M0 core:

• 32-bit RISC architecture
• Up to 48MHz clock frequency
• 3-stage pipeline
• Thumb-2 instruction set
• NVIC for interrupts handling
• Embedded Trace Macrocell (ETM)
• Memory Protection Unit (MPU)
• Single-cycle 32-bit multiplier

Reset Behavior in Cortex-M0

When the Cortex-M0 microcontroller is powered on or reset using external reset pin, the processor initializes all registers to their reset values and starts executing instructions from the reset vector address. The reset vector address is always 0x00000000 for Cortex-M0.

The reset vector points to the start of the boot code or startup routine programmed by the developer. This boot code sets up the stack pointer, heap, performs chip initialization and copies data sections to RAM before passing control to the main application.

Reset Sequence

Here are the key steps in the reset sequence for Cortex-M0:

1. On reset, all core registers are set to their reset values
2. Main Stack Pointer (MSP) is initialized from value located at 0x00000000
3. Execution starts from reset vector address 0x00000000
4. Startup code initializes data sections and zero initializes .bss section
5. Control is passed to main() function

Vector Table

The vector table is a vital data structure located at the reset vector address and holds the addresses of all exception and interrupt handlers. The Cortex-M0 vector table contains a stack pointer value at offset 0x00 and 15 exception vectors from offset 0x04 to 0x3C.

Here is the memory layout of the vector table for Cortex-M0: 0x00 Initial stack pointer value 0x04 Reset handler … 0x08 NMI handler … 0x0C HardFault handler … 0x10-0x3C Other exception handlers

Configuring the Reset Vector Address

While 0x00000000 is the default reset address, the actual reset address of Cortex-M0 can be configured to a different location for flexibility. This allows keeping the vector table anywhere in code memory instead of always at the start of flash.

To configure a custom reset vector address, the following steps need to be taken:

1. Define a new vector table section at the desired address
2. Point VTOR register to this new address
3. Program startup code to initialize SP from vector table

For example, to set reset vector address to 0x00002000, the vector table section would look like: .section .vectors, “xa” .code 16 .align 2 .global _vectors _vectors: .word _estack /* 0x00002000 Initial stack pointer value */ .word Reset_Handler /* 0x00002004 Reset handler */ …

And VTOR register would be set to 0x00002000 in the startup code before calling main(). This updates the exception handler addresses.

Boot Sequence after Reset

When Cortex-M0 wakes up after reset, the following sequence of events happen:

1. Processor loads stack pointer value from first word of vector table
2. Execution starts from reset vector (second word of vector table)
3. Reset handler enables FPU if used
4. Main stack pointer and base pointer registers are set up
5. .data section is copied from flash to RAM
6. .bss and other variables are zero initialized in RAM
7. VTOR register is configured if reset address is changed
8. System and peripheral clocks are configured
9. Individual peripherals like GPIO, timers, I2C etc are initialized
10. Main application function is called

All this boot and initialization code executed before main() is called the startup code or boot sequence. It is highly platform specific and is provided by the Silicon vendor as a library with all the required init functions.

Example: Changing Reset Vector Address

Here is an example demonstrating how reset vector can be configured to a non-default address in startup code for an imaginary Cortex-M0 platform: .section .vectors .code 16 .align 2 vector_table: .word _estack .word Reset_Handler Reset_Handler: /* Set vector table offset register */ LDR R0, =0xE000ED08 LDR R1, =vector_table STR R1, [R0] /* Initialize data and bss sections */ … /* Call SystemInit() to configure clocks */ BL SystemInit … /* Call main() function */ BL main .end

In this example, the vector table is defined at a separate link time address vector_table. The VTOR register is set to this new address in the Reset_Handler. This changes the exception vector addresses from default values. Then SystemInit() and main() are called to complete the boot sequence.

Summary

The key points about Cortex-M0 reset vector are:

• Default reset vector is 0x00000000
• Reset vector can be configured to custom address
• Vector table contains stack pointer and 15 exception handlers
• Startup code initializes chip peripherals and data sections
• Understanding boot sequence is important for bare metal programming

Configuring the reset vector provides flexibility to place vector table anywhere in code memory. This allows bootloader implementations and other advanced use cases.