When it comes to low power consumption, ARM processors are among the leaders in the industry. The ARM architecture is designed to provide high performance and efficiency, making ARM chips ideal for battery-powered and embedded devices where energy usage needs to be minimized.
Over the years, ARM and its partners have continued to push the boundaries on power efficiency. Modern ARM application processors can deliver laptop-class performance at smartphone-like power levels. But if you’re looking for the absolute lowest power ARM chip available, that title goes to the Cortex-M0+ processor.
Introducing the Cortex-M0+
The Cortex-M0+ is an 32-bit ARM processor core launched by ARM Holdings in 2012. It’s part of ARM’s Cortex-M series which targets embedded and IoT applications. The ‘M’ stands for microcontroller, emphasizing the focus on low cost and power efficiency.
Unlike application processors which run complex operating systems like Android or iOS, the Cortex-M0+ is a microcontroller designed to run simple real-time operating systems (RTOSes) or bare metal code. It’s intended for basic tasks like sensing, control, and interfacing with external devices.
The Cortex-M0+ is a successor to the original Cortex-M0 core. It takes everything that made the M0 successful and improves performance by up to 15% while maintaining the same ultra low power profile. Some key specs of the Cortex-M0+ core include:
- 32-bit ARMv6-M architecture
- Up to 48MHz max clock frequency
- 2-stage pipeline
- 32KB instruction cache
- Optional 32KB data cache
- Memory protection unit
- Single-precision floating point unit
Despite the modest specifications, the M0+ delivers significantly higher performance than 8-bit and 16-bit microcontroller alternatives while matching their low power characteristics.
Minimizing Power Consumption
So what makes the Cortex-M0+ so efficient when it comes to power draw? There are a few key architectural and design elements that enable its ultra low power capabilities:
- ARM Thumb instruction set – The Thumb instruction set is a compressed variant of the ARM instruction set which uses 16-bit encoding instead of 32-bit. This reduces code size by around 30-40% which improves efficiency and conserves memory.
- Single-cycle GPIO – The M0+ core can perform a GPIO peripheral access in a single clock cycle, reducing power wasted waiting for I/O.
- Architectural simplicity – The stripped down nature of the M0+ core eliminates unnecessary logic that would consume power. There are no caches on chip, a single 2-stage pipeline, and only basic peripherals.
- Process optimization – ARM partners can optimize their silicon process technology to minimize leakage current which is a major source of power drain.
- Clock gating – Unused parts of the core can be power gated to prevent wasted power from clocking unused logic.
- Extensive sleep modes – Software can place the system into sleep modes where only certain logic remains powered.
By combining an efficient RISC architecture with extensive power optimization techniques, ARM has made the Cortex-M0+ exceptionally good at maximizing battery life and minimizing energy usage.
Cortex-M0+ Implementations
As an IP core, the Cortex-M0+ requires silicon partners to integrate it into full System-on-Chip (SoC) designs. There are now many microcontrollers on the market pairing the M0+ with flash memory, peripherals, and other components to create full embedded solutions. Some examples include:
- STM32L0 – STMicroelectronics’ ultra low power microcontrollers based on the Cortex-M0+ core. Features multiple low power modes and wakeup sources.
- SAM L10/L11 – Entry-level ARM Cortex-M0+ MCUs from Microchip. Offer security features and low active power consumption down to 110 μA/MHz.
- EFM32 Zero – Silicon Labs’ Gecko MCUs combine the M0+ core with features like LCD controllers and capacitive touch. Active power below 200 μA/MHz.
- Nordic nRF51 – Bluetooth Low Energy SoCs using the Cortex-M0 core. Extremely low Rx/Tx power consumption for wireless connectivity.
There are many other M0+ based microcontrollers on the market from vendors like NXP, Cypress, Renesas, Maxim Integrated, and others. The variety of implementations demonstrates the versatility of the Cortex-M0+ in serving ultra low power applications.
Power Consumption Comparisons
It’s hard to pin down the exact power consumption of the Cortex-M0+ core alone since it depends heavily on the specific implementation. But ARM has shared some approximate active and sleep mode power usage estimates:
- 180 μA/MHz in typical commercial process
- 150 μA/MHz in a low power process
- 2.1 μA in sleep mode with wake up interrupt
- 1.2 μA in deep sleep mode
- 400 nA in standby mode retaining SRAM
To put those numbers in perspective, here’s how Cortex-M0+ implementations compare to other common low power microcontroller architectures:
Microcontroller | Typical Active Power | Typical Sleep Power |
---|---|---|
8-bit AVR (Atmega328) | 1 mA/MHz | 0.1 μA |
16-bit MSP430 | 1.8 mA/MHz | 5.1 μA |
32-bit Cortex-M0+ | 180 μA/MHz | 2.1 μA |
While not as low power as an 8-bit or 16-bit MCU, the Cortex-M0+ still achieves very low power operation while providing significantly higher performance. For low throughput embedded applications like wireless sensors, the Cortex-M0+ hits the sweet spot between power efficiency and 32-bit computational capabilities.
Future Low Power ARM Options
Since the launch of the Cortex-M0+, ARM has continued enhancing its low power microcontroller offerings. Some examples of more recent low power ARM processor cores include:
- Cortex-M23 – A revision of the Cortex-M0+ optimized for even lower power. Adds architectural enhancements to boost energy efficiency by up to 40%.
- Cortex-M33 – Introduces the ARMv8-M architecture and TrustZone security. Still low power but higher performance than M0+.
- Cortex-M55 – Latest dual-core MCU optimized for smart sensors and industrial. Scalable power modes for flexibility.
ARM’s other ultra low power chip designs include the Cortex-R series for always-on processing applications. But for now, the Cortex-M0+ remains the gold standard for low power operation among ARM’s microcontroller class processors.
Conclusion
The Cortex-M0+ achieves impressively low power operation through an efficient RISC architecture, extensive power optimizations, and advanced process technologies. While not the only low power ARM processor, it represents the entry-level standard for power constrained embedded applications needing 32-bit performance and advanced features.
With active power consumption down to 150 μA/MHz on advanced processes, and sleep modes drawing just microamps, the Cortex-M0+ opens up new possibilities for battery-powered IoT edge devices. Its combination of power efficiency, performance, and features make the Cortex-M0+ a leader for low power ARM processing.