The Arm Cortex startup sequence refers to the steps that are followed when powering up an Arm Cortex-based system-on-chip (SoC). This startup process initializes the processor, memory, and peripherals to get the system into an operational state. The exact details of the startup sequence can vary between different Arm Cortex implementations and SoC designs, but generally involves the following high-level steps:
1. Power On Reset
When power is first applied to a Cortex-based SoC, the power management unit asserts a power on reset signal to the processor and other components. This resets them to a known initial state ready for startup.
2. Boot Rom Execution
Arm Cortex processors include an on-chip read-only memory (ROM) known as the Boot ROM. After reset, the processor starts executing code from the Boot ROM. The Boot ROM performs essential low-level chip initialization, such as configuring clock generators, memory controllers, and IO peripherals.
3. Load Bootloader
After the initial chip setup, the Boot ROM loads the primary bootloader code into memory and transfers execution to it. This bootloader is usually located in non-volatile on-chip memory like flash or ROM, external boot flash, or loaded by a debug probe connected to the processor.
4. Bootloader Execution
The bootloader that was loaded performs additional setup tasks needed before launching the main operating system or application. This may include further SOC initialization, configuring DRAM memory, enabling peripherals needed for storage access, checking security credentials, and loading firmware or configuration data.
5. Load Operating System
The final step performed by the bootloader is locating the operating system image, loading it into memory, and transferring execution to its entry point. This image is typically stored in flash memory or loaded from an external storage device.
6. Operating System Boot
With execution passed to it, the operating system kernel takes over the startup process. It will initialize any drivers and subsystems it requires, mount filesystems, launch background services, and ultimately load and run applications to reach an operational user-level environment.
Key Components Involved
There are several key hardware and software components involved in the Cortex startup process:
- Boot ROM – On-chip read-only memory that performs the initial low-level SoC initialization.
- Bootloader – First-stage software loaded by Boot ROM that configures DRAM and loads the operating system.
- Operating System – Software that takes over after the bootloader to initialize the system and applications.
- Reset Circuitry – Power on reset generator that initializes the SoC.
- Clock Generators – Provides clock signals to synchronize components during startup.
- Memory Controllers – Configured by boot code to enable access to DRAM and storage.
- Debug Port – Interface that allows loading external bootloader or firmware.
Typical Steps in More Detail
Here is a more detailed look at the typical steps in the Cortex startup sequence:
1. Power on Reset
- Power on reset controller asserts reset signals on power up to initialize processor and SoC logic.
- Reset vectors processor to execute code at fixed boot vector address in Boot ROM.
- Reset may be held for a minimum time to ensure stability before boot begins.
2. Boot ROM Execution
- Hardwired Boot ROM code begins executing out of on-chip mask ROM or OTP memory.
- Enables clocks to processor, memory, peripherals, and interconnect.
- May perform security checks of ROM contents.
- Configures memory controllers for operation.
- Initializes board-level IO devices enough to allow bootloader loading.
- Contains instructions to load bootloader from supported locations.
3. Load Bootloader
- Boot ROM loads bootloader into on-chip SRAM or DRAM from supported locations.
- Common bootloader locations: Flash memory, serial ROM, SD card, USB drive, network, debug probe.
- Bootloader may be stored in encrypted format for security.
4. Bootloader Execution
- After loading, boot ROM jumps to entry point of bootloader code.
- Performs low-level chip initialization not done by Boot ROM.
- Initializes external DRAM and memory controllers if present.
- Configures peripherals needed for storage access or network boot.
- May load firmware images from flash into RAM for execution.
- Verifies integrity and authenticity of firmware.
5. Load Operating System
- Bootloader locates operating system image in storage based on preset configuration.
- Common locations: eMMC, SD card, NAND flash, USB drive, network server.
- Bootloader copies OS image sections from storage to RAM.
- Any firmware drivers or images needed by OS may also be preloaded.
6. Operating System Boot
- After loading, bootloader jumps to preset entry point of OS image.
- OS initializes its own low-level hardware drivers.
- May load other drivers and modules from storage.
- Typically mounts at least initial RAM filesystem.
- Starts essential background services.
- Boots graphical UI or console interface.
- Finally launches user applications to reach steady state.
Startup Customization
There are several ways that the Cortex startup process can be customized or optimized in a particular design:
- Boot ROM code can be customized by the SoC designer to support specific initialization requirements.
- Multiple bootloader stages can be chained to modularize initialization tasks.
- Startup code can be optimized to minimize time-to-boot for an application.
- Specialized bootloaders can be created to load particular operating systems.
- Bootloader can be configured to verify authenticity of loaded firmware.
- Debug port can be leveraged to develop and debug startup code.
Conclusion
In summary, the Arm Cortex startup sequence consists of an initial bootstrap by the processor Boot ROM followed by progressively more complex software initialization by bootloader and operating system code. This sequence is designed to methodically bring up and validate hardware and software components to ultimately boot a functional operating system and application environment with the highest possible robustness and security.
While the exact steps vary across Cortex implementations, the overall flow of execution from built-in ROM to bootloader to OS remains consistent. Chip designers can customize this sequence by providing their own optimized initialization routines and boot firmware.
Understanding the basic flow of a Cortex startup sequence provides visibility into the foundation on which Arm-based systems are built to operate reliably and performantly.
