SoC
  • Home
  • Arm
  • Arm Cortex M0/M0+
  • Arm Cortex M4
  • Arm Cortex M3
  • Contact
Reading: How to Boot Cortex-M3 STM32F1 from RAM?
SUBSCRIBE
SoCSoC
Font ResizerAa
  • Home
  • Arm
  • Arm Cortex M0/M0+
  • Arm Cortex M4
Search
  • Home
  • Arm
  • Arm Cortex M0/M0+
  • Arm Cortex M4
Have an existing account? Sign In
Follow US
  • Looking for Something?
  • Privacy Policy
  • About Us
  • Sitemap
  • Contact Us
© S-O-C.ORG, All Rights Reserved.
Arm

How to Boot Cortex-M3 STM32F1 from RAM?

Javier Massey
Last updated: October 5, 2023 9:55 am
Javier Massey 6 Min Read
Share
SHARE

Booting Cortex-M3 STM32F1 microcontrollers from RAM instead of flash memory can offer performance benefits like faster boot times. However, it requires configuring the chip’s boot options and setting up a RAM-based bootloader. This guide will walk through the key steps for booting STM32F1 chips from RAM.

Contents
Overview of Booting from RAMConfiguring System MemoryCreating a RAM BootloaderBuilding Application for RAMConfiguring Boot OptionsBoot SequenceOptimizing RAM UtilizationConclusion

Overview of Booting from RAM

Most microcontrollers boot by default from internal flash memory, where the program code is stored. However, flash memory has slower read speeds compared to RAM. Booting from RAM can skip the flash access and improve boot performance.

To boot from RAM, a small bootloader must first be programmed into flash memory. On startup, this bootloader copies the main application code from flash to RAM, then jumps to execute from RAM. A reserved region of RAM holds the main code image.

Key steps to implement RAM booting on Cortex-M3 STM32F1:

  • Configure system memory for RAM bootloader and application image
  • Create RAM bootloader and program it into flash
  • Build application code and link it to RAM address
  • Set boot configuration options to boot from RAM

Configuring System Memory

The first step is planning out the memory map to accommodate both the bootloader and application image in RAM. A region of RAM needs to be reserved for storing the application code.

For example, on a STM32F103 with 64KB RAM, we could allocate the memory like this:

  • Bootloader: 0x20000000-0x20000FFF (4KB)
  • Application image: 0x20001000-0x2007FFFF (60KB)

The bootloader size depends on requirements, but 4KB is typical. The remaining RAM is available for the application.

This memory layout is defined through the linker script file used for building the bootloader and application code.

Creating a RAM Bootloader

With the memory map defined, we can now create a minimal bootloader program in C or assembly language. The key tasks of the bootloader are:

  1. Configure RAM and copy application image from flash to RAM
  2. Jump to application entry point in RAM

For the STM32F103 example, this could look like: // Bootloader code void bootloader() { // Enable RAM, copy application SCB->VTOR = APPLICATION_RAM_ADDRESS; copy_application(); // Jump to application jump_to_application(); }

The bootloader is compiled and linked to execute from the reserved bootloader RAM region. It is programmed into the chip’s flash memory using STM32 programming tools.

Building Application for RAM

With the bootloader set up, the main application code can be compiled to execute from the application RAM space.

In the linker script, set the code and data sections to start at the defined application RAM address. For example: MEMORY { RAM (xrw) : ORIGIN = 0x20001000, LENGTH = 60K } SECTIONS { .text : { *(.text*) } > RAM .data : { *(.data*) } > RAM }

Compile the code with these linker settings. The resulting application binary will be linked to run from the dedicated RAM region.

Configuring Boot Options

Finally, configure the Cortex-M3 system control register to boot from RAM instead of flash: SCB->VTOR = APPLICATION_RAM_ADDRESS;

This points the reset vector to the application RAM address instead of flash. Combined with the bootloader, this will cause the system to load and execute the application from RAM on startup.

The vector table offset register (VTOR) can be configured in the bootloader startup code. Alternatively, many STM32 chips have configuration bits to set the VTOR value in flash memory.

Boot Sequence

With everything set up, the boot process will be:

  1. On reset, CPU fetches reset vector from application RAM address
  2. Bootloader initialization runs from dedicated bootloader RAM
  3. Bootloader copies application image to RAM
  4. Bootloader jumps to application entry point in RAM
  5. Application runs fully from RAM

This sequence bypasses flash access for improved performance. The application RAM space can also be preloaded for faster booting.

Optimizing RAM Utilization

Some optimizations can further improve RAM usage:

  • Place only the minimum startup and initialization code in the bootloader.
  • Use a binary application image instead of full .text and .data sections.
  • Compress the application image to save RAM.
  • Override weak functions like printf() to minimize bootloader footprint.

Careful planning of the memory map is key to maximizing available application RAM. The bootloader should be as small as possible.

Conclusion

Booting Cortex-M3 STM32F1 chips from RAM provides faster starts up by skipping slow flash reads. A small bootloader in RAM loads the application image and jumps to execution. With careful memory configuration, most of the available RAM can be used for the application.

RAM booting requires firmware changes but can improve performance-critical boot times. Other optimization techniques like overlaying can also help minimize flash usage. With some effort, RAM booting can enable more responsive waking from sleep and faster starts.

Newsletter Form (#3)

More ARM insights right in your inbox

 


Share This Article
Facebook Twitter Email Copy Link Print
Previous Article Deciphering the (Cortex-M3) STM32F1 Vector Table when Booting from RAM
Next Article STM32F1(Cortex-M3) SRAM Boot Magic Values
Leave a comment Leave a comment

Leave a Reply Cancel reply

Your email address will not be published. Required fields are marked *

2k Followers Like
3k Followers Follow
10.1k Followers Pin
- Sponsored-
Ad image

You Might Also Like

ARM SVC Instruction Example

The SVC (Supervisor Call) instruction is an important part of…

8 Min Read

Arm’s Compare and Branch Instructions (CBZ and CBNZ) Explained

The ARM Cortex series of chips support conditional execution of…

8 Min Read

What is Basepri?

Basepri is a register found in ARM Cortex processor cores…

5 Min Read

Using Cortex-M1 with FPGA Tools and Kits

The Cortex-M1 processor from ARM is a 32-bit RISC CPU…

7 Min Read
SoCSoC
  • Looking for Something?
  • Privacy Policy
  • About Us
  • Sitemap
  • Contact Us
Welcome Back!

Sign in to your account