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Arm

Cortex-M0 SysTick Timer

Graham Kruk
Last updated: September 8, 2023 10:53 am
Graham Kruk 6 Min Read
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The Cortex-M0 SysTick timer is a simple countdown timer available in ARM Cortex-M0 and Cortex-M0+ processors. It provides a simple way to generate periodic interrupts for operating system ticks or software delays. The SysTick timer is integrated into the core of Cortex-M0 processors and does not require any external components or peripherals.

Contents
SysTick OverviewSysTick Reload ValueSysTick Clock SourceEnabling and Configuring SysTickSysTick InterruptsSysTick CalibrationUsing SysTick for an RTOSSysTick for Software DelaysCortex-M0 Processor SupportConclusion

SysTick Overview

The SysTick timer is a 24-bit counter that counts down from a reload value to zero. It has the following key features:

  • 24-bit counter
  • 1 MHz clock source
  • Configurable reload value
  • Interrupt on countdown to zero
  • Configurable interrupt priority

The timer always counts down each clock cycle. When the counter reaches zero, it will generate an interrupt if enabled and then reload the start value to start again. This creates a periodic interrupt at a rate set by the reload value.

SysTick Reload Value

The reload value is a 24-bit value that controls the countdown period and interrupt rate. It is loaded into the current value register when the counter reaches zero. Some key points:

  • Reload value from 1 to 0xFFFFFF (16MHz to 1Hz)
  • Smaller value = faster interrupts
  • Maximum interrupt rate is 1 MHz
  • Reload value of zero disables the timer

Typical reload values may range from 1000 (1kHz rate) up to 0xFFFFFF (1Hz rate). The reload value can be changed at any time to modify the interrupt rate.

SysTick Clock Source

The SysTick timer has a fixed 1MHz clock source from the core. This means the timer decrements every 1 microsecond. The clock speed is not configurable by software. Some key points on the clock source:

  • Fixed 1 MHz clock from Cortex-M0 core
  • Not configurable or adjustable
  • Decrements counter every 1us

The use of a 1MHz clock source means the timer accuracy has 1 microsecond resolution. The interrupt interval can be set in 1us increments by changing the reload value.

Enabling and Configuring SysTick

The SysTick timer is enabled and configured using its control and status registers (STK). This includes:

  • STK_CTRL – Control register
  • STK_LOAD – Reload value register
  • STK_VAL – Current value register
  • STK_CALIB – Calibration register

To enable SysTick with a 1kHz interval:

  1. Set STK_LOAD to 1000-1 (999)
  2. Enable counter and interrupt in STK_CTRL register
  3. Clear STK_VAL to 0

This will start the counter from 999 and generate an interrupt every 1ms.

SysTick Interrupts

The SysTick timer can generate an interrupt when the counter reaches zero. The interrupt can be used for:

  • Periodic software ticks
  • Software delays and timing
  • Triggering background tasks

The interrupt requires handler code to be written with defined vector in the interrupt table. The interrupt can have configurable priority in the Nested Vectored Interrupt Controller (NVIC).

SysTick Calibration

The STK_CALIB register is used to tune and compensate the 1MHz clock source. This value is trimmed during chip production and should not need modification. The Cortex-M0 user manual documents the calibration process in detail.

Using SysTick for an RTOS

The SysTick timer is commonly used to generate periodic ticks for real-time operating systems (RTOS). It provides a simple and efficient tick source to trigger context switches and task scheduling.

Typical steps for using SysTick with an RTOS:

  1. Configure STK_LOAD for desired tick rate
  2. Setup SysTick interrupt handler
  3. In handler, call OS tick handler/scheduler
  4. Start SysTick timer

The RTOS will then use the ticks to change tasks and schedule work. SysTick allows the OS to be tickless when idle and avoid wasted interrupts.

SysTick for Software Delays

The SysTick counter can also be used for software delays and timing. A simple approach:

  1. Set reload value for required delay
  2. Poll STK_VAL register until it reaches zero

This busy wait approach blocks the CPU but provides accurate delays. More advanced designs use the interrupt and background counting to avoid wasting CPU cycles.

Cortex-M0 Processor Support

The SysTick timer is integrated in all Cortex-M0 and Cortex-M0+ processors from ARM. This includes microcontrollers from various manufacturers such as STMicroelectronics, NXP, Silicon Labs, TI, Cypress, and others. Consult the reference manual for your specific MCU to utilize SysTick.

Conclusion

In summary, the Cortex-M0 SysTick timer provides a simple way to generate periodic interrupts and delays in microcontroller software. Key characteristics include:

  • Integrated core timer with 1MHz clock
  • 24-bit reloadable down counter
  • Configurable interrupt on timer expiry
  • Commonly used for RTOS ticks and software delays

The SysTick timer reduces microcontroller hardware requirements and eases timing in firmware. Check your Cortex-M0 reference manual for the register and bit definitions to use it.

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