The Cortex-M0, Cortex-M3, and Cortex-M4 ARM processors all support both the original Thumb instruction set as well as the newer Thumb-2 instruction set. The key difference is that Thumb-2 builds upon and extends the 16-bit Thumb instruction set with 32-bit instructions to provide additional functionality while maintaining backwards compatibility with existing Thumb code.
Overview of Thumb and Thumb-2
The original Thumb instruction set was introduced in ARMv4T architecture as a 16-bit instruction set intended to improve code density compared to 32-bit ARM instructions. Thumb code is able to achieve higher density by using 16-bit encodings for common instructions like adds, subs, movs, etc. However, Thumb has limitations in only supporting a 16-bit instruction length and lacks many ARM instructions like multiplies, divides, and branches.
Thumb-2 was introduced in ARMv6T2 architecture and is a variable length instruction set that adds 32-bit encodings alongside the 16-bit Thumb encodings. This allows it to incorporate manyARM instructions that were missing in the original Thumb like multiplies and branches. Thumb-2 is able to maintain backwards compatibility with Thumb code while also providing the performance and functionality benefits of 32-bit ARM instructions when needed.
Cortex-M0 Support for Thumb and Thumb-2
The Cortex-M0 CPU implements the ARMv6-M architecture which includes full support for both Thumb and Thumb-2 instruction sets. The Cortex-M0 is a 32-bit processor but uses the Thumb-2 instruction set to achieve high code density for embedded applications. All Cortex-M0 code must use the Thumb-2 instruction set.
Key features of Cortex-M0 Thumb-2 support:
- 16-bit and 32-bit instruction encodings for improved code density
- Load/store architecture with support for Thumb-2 branching
- Thumb-2 multiplier is supported for 32-bit multiply operations
- Includes Thumb-2 SIMD instructions for improved digital signal processing
- Maintains backwards compatibility with existing Thumb code
The Cortex-M0 does not support ARM’s 32-bit ARM instruction set and can only execute Thumb-2 instructions. This focus on solely Thumb-2 allows the M0 to achieve high code density crucial for embedded applications with tight memory constraints.
Cortex-M3 Support for Thumb and Thumb-2
The Cortex-M3 CPU implements the ARMv7-M architecture which includes support for both Thumb and Thumb-2 instruction sets. Cortex-M3 supports intermixing both Thumb, Thumb-2, and 32-bit ARM instructions together in a single application.
Key features of Cortex-M3 Thumb and Thumb-2 support:
- 16-bit Thumb and 32-bit Thumb-2 encodings
- 32-bit ARM instruction set support for specialized operations
- Thumb-2 branch instructions improve performance of branches
- Divide instructions supported in hardware in both Thumb-2 and ARM encodings
- Thumb-2 multiplier and SIMD instructions available
- Can freely mix 16-bit Thumb, 32-bit Thumb-2, and 32-bit ARM instructions
The added flexibility of mixing Thumb, Thumb-2, and ARM code allows the Cortex-M3 to balance code density and performance. Thumb-2 delivers efficiency for most tasks while ARM code can be used selectively for DSP or math intensive portions that benefit from 32-bit ARM performance.
Cortex-M4 Support for Thumb and Thumb-2
The Cortex-M4 implements the same ARMv7-M architecture as the M3, providing support for intermixing Thumb, Thumb-2, and ARM instructions. The main differences are the M4 includes additional Thumb-2 DSP and floating point instructions:
- Floating point unit supports single precision floating point in hardware
- Thumb-2 instruction set enhanced with additional DSP instructions
- Hardware divide supported in both Thumb-2 and ARM instruction sets
- Optional single cycle I/O to improve performance
- Thumb-2 branch instructions reduce branching overhead
The Cortex-M4 allows developers to write highly optimized DSP and floating point code using the Thumb-2 instruction set. The tight integration of its floating point unit and low latency I/O allows the M4 to handle signal processing workloads efficiently while still maintaining great real-time responsiveness.
Mixing Thumb and Thumb-2 Code
The ability to mix and match Thumb, Thumb-2, and ARM instructions is a key advantage of the Cortex-M3 and M4 over earlier designs like the M0. Here are some guidelines on combining Thumb code with Thumb-2:
- Use Thumb-2 encodings for performance critical code sections
- Use Thumb encodings for non-critical code to save space
- Place Thumb code in separate functions from Thumb-2 code
- Use Thumb-2 branch instructions when branching between Thumb and Thumb-2 functions
- Validate linker and compiler support mixing instruction sets
- Use compiler intrinsics or directives to force Thumb or Thumb-2 encodings
Proper use of mixed Thumb and Thumb-2 code allows developers to write optimized DSP or math routines in Thumb-2 while less performance sensitive control code can use Thumb. This provides both high density and high performance.
Benefits of Cortex-M Thumb-2 Support
Here are some of the key benefits of Thumb-2 instruction set support on Cortex-M class processors:
- Higher code density than 32-bit ARM instructions
- Enables use of 32-bit encodings alongside 16-bit Thumb
- Adds many ARM instructions missing from original Thumb ISA
- SIMD and DSP instructions to accelerate multimedia workloads
- Hardware divide supported in Thumb-2 on Cortex-M3/M4
- Floating point unit added in Cortex-M4 Thumb-2
- Maintains backwards code compatibility with Thumb
- More efficient branching than earlier Thumb versions
In summary, Thumb-2 support gives Cortex-M series processors an instruction set with both high code density through 16-bit Thumb encodings as well as excellent performance from 32-bit instructions. This combination of small size and good performance makes Thumb-2 well suited for embedded applications.
