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Bit-band Regions in Arm Cortex (Explained)

Graham Kruk
Last updated: September 28, 2023 3:45 pm
Graham Kruk 8 Min Read
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Bit-banding is a feature in some Arm Cortex processors that allows single bit modifications to be made to memory mapped peripherals without the overhead of a read-modify-write sequence. This provides an efficient mechanism to set or clear individual bits in registers. Bit-band regions map a complete word in memory to a single bit in the bit-band alias memory region. Writes to bit-band alias memory modify only the targeted bit in the corresponding word in the bit-band region.

Contents
What are Bit-band Regions?Bit-band Region Address MappingAdvantages of Bit-band RegionsBit-banding in Cortex-MCortex-M Bit-band Memory MapAccessing Bit-band AliasesBit-banding Usage ExamplesLimitations of Bit-bandingBit-band Region SizePerformance Overhead32-bit Access OnlyNot All Peripherals IncludedConclusion

What are Bit-band Regions?

Bit-band regions are sections of physical memory that are aliased into bit-band alias memory. Each word in a bit-band region is mapped to a bit in the bit-band alias memory. This allows atomic read-modify-write access to a single bit within a word of memory. Without bit-banding, setting or clearing a single bit requires a read of the entire word, modifying the bit, then writing the word back. Bit-banding eliminates this overhead by providing single-bit access through the alias memory. Writes to the alias memory affect only the mapped bit in the bit-band region.

Bit-band Region Address Mapping

The bit-band regions are defined in the Arm system architecture. For Cortex-M processors, two 1MB bit-band regions are defined – one for SRAM and one for peripherals. The bit-band alias regions are offset from the bit-band regions by a constant value. This allows conversion between bit-band addresses and alias addresses using simple formulas.

For example, to convert a SRAM address to a bit-band alias address:

  • SRAM bit-band region base: 0x20000000
  • SRAM bit-band alias offset: 0x02000000
  • Bit-band alias address = Bit-band region base + (byte_offset x 32) + (bit_number x 4)

So to access bit 5 of byte 0x100 in SRAM:

  • SRAM address: 0x20000100
  • Byte offset: 0x100
  • Bit number: 5
  • Alias address = 0x20000000 + (0x100 x 32) + (5 x 4) = 0x22000114

A write to 0x22000114 will set or clear only bit 5 in 0x20000100.

Advantages of Bit-band Regions

The main advantages of bit-band regions are:

  • Atomic read-modify-write for single bit access
  • Faster than read-modify-write sequence for peripheral registers
  • Simplify setting/clearing bits in control registers
  • Avoid software locks when multiple threads access shared bits

Bit manipulation using bit-band alias registers helps optimize performance and code size compared to traditional read-modify-write sequences.

Bit-banding in Cortex-M

The Arm Cortex-M series of processors include bit-band regions in their memory maps. Two 1MB regions are defined – one for SRAM and one for peripherals. The SRAM bit-band region maps to internal SRAM while the peripheral region maps to memory-mapped registers.

Cortex-M Bit-band Memory Map

In Cortex-M, the bit-band regions are defined as:

  • SRAM bit-band base: 0x20000000
  • SRAM bit-band size: 1MB
  • Peripheral bit-band base: 0x40000000
  • Peripheral bit-band size: 1MB

The corresponding alias regions are:

  • SRAM alias base: 0x22000000
  • Peripheral alias base: 0x42000000

So the SRAM and peripheral bit-band regions occupy the lower 1MB of each region, with the alias regions following immediately after.

Accessing Bit-band Aliases

To access a bit-band alias location, convert the target address to a bit-band alias address using the formulas:

  • SRAM: Alias = 0x22000000 + (Byte_offset x 32) + (Bit_num x 4)
  • Peripheral: Alias = 0x42000000 + (Byte_offset x 32) + (Bit_num x 4)

Then simply read from or write to this alias address to access the targeted bit. The processor handles the address translation automatically.

Bit-banding Usage Examples

Here are some examples of bit-banding in Cortex-M:

  • Set bit 5 in GPIO port A:
    • GPIOA base: 0x40020000
    • Byte offset: 0x0000
    • Bit number: 5
    • Alias address = 0x42000000 + (0x0000 x 32) + (5 x 4) = 0x42000114
    // Atomically set bit 5 in GPIOA *(volatile uint32_t*)0x42000114 = 1;
  • Toggle bit 0 in NVIC ISER0 register:
    • ISER0 address: 0xE000E100
    • Byte offset: 0xE100
    • Bit number: 0
    • Alias address = 0x42000000 + (0xE100 x 32) + (0 x 4) = 0x4200E100
    // Toggle IRQ0 enable bit *(volatile uint32_t*)0x4200E100 = 1;
  • Clear pending bit 3 in EXTI_PR:
    • EXTI_PR address: 0x40013C14
    • Byte offset: 0x3C14
    • Bit number: 3
    • Alias address = 0x42000000 + (0x3C14 x 32) + (3 x 4) = 0x42003C34
    // Clear pending bit for EXTI line 3 *(volatile uint32_t*)0x42003C34 = 1;

This demonstrates how bit-banding can simplify peripheral register access and bit manipulation for Cortex-M cores.

Limitations of Bit-banding

While bit-banding is useful, there are some limitations to consider:

  • Only 1MB of SRAM and 1MB of peripherals are bit-addressable
  • Not all ARM Cortex CPUs include bit-band regions
  • Bit-band accesses are slower than direct SRAM access
  • Not all peripheral registers are mapped into the bit-band region
  • Aliased bits can only be accessed as full 32-bit words

So bit-banding does not replace normal memory access methods. Rather, it supplements them by providing atomic single-bit manipulation for selected memory regions.

Bit-band Region Size

The relatively small 1MB size of the bit-band regions means only a portion of memory is aliased. So larger memories and peripherals are not fully contained in the regions. Aliased access is only possible where addresses overlap the bit-band area.

Performance Overhead

The address translation and bus arbitration for bit-band accesses introduce a small performance penalty. Accessing SRAM directly will be faster than going via the bit-band alias.

32-bit Access Only

The bit-band alias regions can only be accessed using full 32-bit reads and writes. 8-bit and 16-bit accesses are not supported. So some overhead is introduced when only accessing a single bit.

Not All Peripherals Included

Vendor implementations differ in which peripheral registers are mapped into the alias memory region. So bit-banding is not universally available across every register in the memory map.

Conclusion

Bit-banding provides an efficient way to manipulate single bits in registers without the overhead of read-modify-write sequences. By mapping memory words to individual bits in an alias region, Cortex-M processors enable atomic access to set, clear or toggle bits in peripheral and SRAM locations. This can simplify peripheral configuration and control, state machines, interrupt handling and other single-bit operations.

Understanding the bit-band address mapping formulas allows targeting specific bits with single 32-bit writes. However, the technique has limitations including size restrictions, performance overhead and lack of support for 8/16-bit access. Bit-banding complements, rather than replaces, conventional memory access methods in Cortex-M based systems.

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